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4.2
Reset
4.2.1
Overview
Reset is the highest priority exception. There are two factors that initiate reset exception handling
as follows.
(1)
RESET Pin Input: When the RESET pin goes low all processing is discontinued and the
system goes to the reset state. A reset causes the CPU internal registers and the built-in peripheral
module registers to be initialized, and then reset exception handling starts immediately.
(2) Watchdog Timer Overflow: When timer C is used as a watchdog timer, the system enters the
reset state when timer C overflows. After performing the same operations as performed in
response to a
RESET pin input, reset exception handling starts immediately.
4.2.2
Reset Sequence
When a reset exception factor occurs the system enters the reset state.
To reliably reset the system when the system clock oscillator is stopped (including the state
immediately following power on), the
RESET pin must be held low for at least the duration of the
oscillator stabilization period, i.e., tRC. Similarly, when stop mode is cleared by a
STOPC pin
input, the
STOPC pin must be held low for at least tRC.
Also, when resetting during normal operation, the
RESET pin must be held low for at least two
instruction cycles.
When a reset exception factor occurs, the system operates as follows.
Note:
Refer to section 25, “Electrical Characteristics”, for detailed information on tRC.
1. When reset exception handling starts due to either a
RESET pin input or a watchdog timer
overflow, the RAM enable flag (RAME) in the register flag area is cleared to 0.
2. The CPU internal states and the built-in peripheral module registers are initialized. The
interrupt enable flag (IE) is cleared to 0 disabling all interrupts. Refer to section 4.4, “Initial
Values of Registers and Flags at Reset and Stop Mode Clear”, for the initial values of the
registers.
3. The vector address $0000 is loaded into the PC. Therefore, the CPU will branch to the reset
handling routine if a JMPL instruction to that routine is stored in locations $0000 and $0001.
The
RESET pin input is an asynchronous input; that is, whatever state the system is in, it will
always goes to the reset state when the
RESET pin goes low.