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3.2
CPU Registers
3.2.1
Accumulator (A) and B Register (B)
The A and B registers are 4-bit registers that hold the results of ALU (arithmetic and logic unit)
operations and transfer data with memory, I/O ports, and other registers.
3.2.2
W Register (W), X Register (X), and Y Register (Y)
The W register is a 2-bit register and the X and Y registers are 4-bit registers that are used in the
RAM register indirect addressing mode. The Y register is also used for D port addressing.
3.2.3
SPX Register (SPX), SPY Register (SPY)
The SPX and SPY registers are 4-bit registers that are used as auxiliary registers for the X and Y
registers.
3.2.4
Carry Flag (CA)
The CA flag is a 1-bit flag that holds the ALU overflow state when an arithmetic instruction is
executed. When an overflow occurs CA is set to 1, and when no overflow occurs, it is cleared to 0.
The CA flag is influenced by the SEC and REC carry set and reset instructions and by the ROTL
and ROTR rotate with carry instructions.
During interrupt handling, the carry state is saved on the stack and restored by the RTNI
instruction.
3.2.5
Status Flag (ST)
The ST flag is a 1-bit flag that holds the result of arithmetic instructions, comparison instructions,
and bit test instructions. It is used as the condition for the BR, BRL, CAL, and CALL conditional
branch instructions. The ST flag retains its value until another arithmetic, comparison, or bit test
instruction is executed. The ST flag is set to 1 after a conditional branch instruction is executed,
regardless of whether the branch condition holds or not.
During interrupt handling, the ST flag state is saved on the stack and restored by the RTNI
instruction.
3.2.6
Program Counter (PC)
The PC is a 14-bit counter that holds the address in ROM of the next instruction that the CPU will
execute.