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參數(shù)資料
| 型號： | GCIXF1002ED |
| 英文描述： | Controller Miscellaneous - Datasheet Reference |
| 中文描述： | 控制器雜項-數(shù)據(jù)表參考 |
| 文件頁數(shù)： | 80/128頁 |
| 文件大?。?/td> | 1262K |
| 代理商： | GCIXF1002ED |
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Intel
IXF1002 Dual Port Gigabit Ethernet Controller
80
Datasheet
6.4
MAC Transmit Operation
This section describes the transmit operation in detail, as supported by the IXF1002. Transmit
activities are registered into the network management registers, which are accessible through the
CPU port.
6.4.1
Transmit Initiation
After the transmit FIFO is adequately filled up to the programmed threshold level
(TX_TSHD<TSD>), or after there is a full frame loaded into the transmit FIFO, the IXF1002 starts
to encapsulate the frame. The transmit encapsulation is performed by the transmit controller, which
delays the actual transmission of the data onto the network until it has been idle for a minimum
interpacket gap (IPG) time.
6.4.2
Inter Packet Gap
Actual transmission of the data onto the network occurs 96-bit time period (by default) after the
completion of the last transmission. The interpacket gap time can be changed through the
IPG_VAL register. In accordance with the standard, the IXF1002 begins to measure the IPG in
full-duplex mode from TEN deassertion.
6.4.3
Frame Encapsulation
The transmit data frame encapsulation stream includes the appending of the 56 preamble bits and the
8 bits of SFD to the basic frame beginning, and the FCS to the basic frame end. The basic frame
loaded from the bus includes the destination address field, the source address field, the type/length
field, and the data field. If the data field length is shorter than 46 bytes and pad appending is not
disabled (TX_RX_PARAM<PADD> or TX_RX_PARAM<CRCD>), the IXF1002 pads the basic
frame with the pattern 00 for up to 46 bytes. At the end of the frame, the IXF1002 appends the FCS
field if CRC appending is not disabled (TX_RX_PARAM<CRCD>). If the txasis signal is asserted at
the beginning of the packet load, the IXF1002 ignores the programmed mode and transmits the frame
without the padding and the FCS field.
In the GMII mode, the transmit enable signal (ten{i}) is asserted together with the first preamble
byte transmission and is deasserted with the last CRC byte transmission.
6.4.4
Terminating Transmission
A specific frame transmission is terminated under any of the following conditions:
Normal
The frame has been transmitted successfully. After the last byte is serialized, the pad and CRC
are optionally appended and transmitted, thus concluding frame transmission.
CRC error
The txerr signal was asserted during packet loading. The IXF1002 infects the CRC it is
building and sends a bad CRC onto the network. A transmit error will be generated as well
(terr assertion in GMII mode, or symbol error in GPCS mode).
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