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參數(shù)資料
| 型號： | DSP56367UM |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 24-Bit Audio Digital Signal Processor |
| 中文描述： | 24位音頻數(shù)字信號處理器 |
| 文件頁數(shù)： | 5/100頁 |
| 文件大小： | 1039K |
| 代理商： | DSP56367UM |
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DSP56367 Technical Data, Rev. 2.1
Freescale Semiconductor
2-1
2
Signal/Connection Descriptions
2.1
Signal Groupings
The input and output signals of the DSP56367 are organized into functional groups, which are listed in
Table 2-1
and illustrated in
Figure 2-1
.
The DSP56367 is operated from a 1.8V supply; however, some of the inputs can tolerate 3.3V. A special
notice for this feature is added to the signal descriptions of those inputs.
Remember, the DSP56367 offers 150 million instructions per second (MIPS) using an internal 150 MHz
clock at 1.8 V and 100 million instructions per second (MIPS) using an internal 100 MHz clock at 1.3.3V.
Table 2-1 DSP56367 Functional Signal Groupings
Functional Group
Number of
Signals
Detailed
Description
Power (V
CC
)
20
Table 2-2
Ground (GND)
18
Table 2-3
Clock and PLL
3
Table 2-4
Address bus
Port A
1
1
Port A is the external memory interface port, including the external address bus, data bus, and control signals.
2
Port B signals are the GPIO port signals which are multiplexed with the HDI08 signals.
3
Port C signals are the GPIO port signals which are multiplexed with the ESAI signals.
4
Port E signals are the GPIO port signals which are multiplexed with the ESAI_1 signals.
5
Port D signals are the GPIO port signals which are multiplexed with the DAX signals.
18
Table 2-5
Data bus
24
Table 2-6
Bus control
10
Table 2-7
Interrupt and mode control
5
Table 2-8
HDI08
Port B
2
16
Table 2-9
SHI
5
Table 2-10
ESAI
Port C
3
12
Table 2-11
ESAI_1
Port E
4
6
Table 2-12
Digital audio transmitter (DAX)
Port D
5
2
Table 2-13
Timer
1
Table 2-14
JTAG/OnCE Port
4
Table 2-15
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