參數(shù)資料
型號： DS2151
英文描述： T1 Single-Chip Transceiver
中文描述： T1單芯片收發(fā)器
文件頁數(shù)： 30/51頁
文件大?。?/td> 1100K
代理商： DS2151
DS2151Q
30 of 51
9.0 CLOCK BLOCKING REGISTERS
The Receive Channel Blocking Registers (RCBR1/RCBR2/RCBR3) and the Transmit Channel Blocking
Registers (TCBR1/TCBR2/TCBR3) control the RCHBLK and TCHBLK pins respectively. The
RCHBLK and TCHCLK pins are user-programmable outputs that can be forced either high or low during
individual channels. These outputs can be used to block clocks to a UART or LAPD controller in
Fractional T1 or ISDN-PRI applications. When the appropriate bits are set to a 1, the RCHBLK and
TCHCLK pins will be held high during the entire corresponding channel time. See the timing in Section
13 for an example.
RCBR1/RCBR2/RCBR3: RECEIVE CHANNEL BLOCKING REGISTERS
(Address=6C to 6E Hex)
(MSB)
CH8
CH7
CH6
CH5
CH16
CH15
CH14
CH13
CH24
CH23
CH22
CH21
(LSB)
CH1
CH9
CH17
CH4
CH12
CH20
CH3
CH11
CH19
CH2
CH10
CH18
RCBR1 (6C)
RCBR2 (6D)
RCBR3 (6E)
SYMBOL
CH24
POSITION
RCBR3.7
NAME AND DESCRIPTION
Receive Channel Blocking Registers
0=force the RCHBLK pin to remain low during this
channel time
CH1
RCBR1.0
1=force the RCHBLK pin high during this channel time
TCBR1/TCBR2/TCBR3: TRANSMIT CHANNEL BLOCKING REGISTERS
(Address=32 to 34 Hex)
(MSB)
CH8
CH7
CH6
CH5
CH16
CH15
CH14
CH13
CH12
CH24
CH23
CH22
CH21
CH20
(LSB)
CH1
CH9
CH17
CH4
CH3
CH11
CH19
CH2
CH10
CH18
TCBR1 (32)
TCBR2 (33)
TCBR3 (34)
SYMBOL
CH24
POSITION
TCBR3.7
NAME AND DESCRIPTION
Transmit Channel Blocking Registers
.
0=force the TCHBLK pin to remain low during this
channel time
CH1
TCBR1.0
1=force the TCHBLK pin high during this channel time
10.0 ELASTIC STORES OPERATION
The DS2151Q has two onboard two-frame (386 bits) elastic stores. These elastic stores have two main
purposes. First, they can be used to rate-convert the T1 data stream to 2.048 Mbps (or a multiple of
2.048 Mbps), which is the E1 rate. Secondly, they can be used to absorb the differences in frequency and
phase between the T1 data stream and an asynchronous (i.e., not frequency locked) backplane clock.
Both elastic stores contain full controlled slip capability which is necessary for this second purpose. The
receive side elastic store can be enabled via CCR1.2 and the transmit side elastic store is enabled via
CCR1.7. The elastic stores can be forced to a known depth via the Elastic Store Reset bit (CCR3.6).
相關(guān)PDF資料
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DS2154L Enhanced E1 Single Chip Transceiver
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS2151DK 功能描述:KIT TRANSCEIVER T1 DESIGN DS2151 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 過時(shí)/停產(chǎn)零件編號 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 傳感器類型:CMOS 成像，彩色（RGB） 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關(guān)產(chǎn)品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP
DS2151K 功能描述:IC TXRX T1 1-CHIP 5V 44-PLCC RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:*
DS2151Q 制造商:DAL 功能描述:2151 DAL'95 NOTES 制造商:Maxim Integrated Products 功能描述:PCM TRANSCEIVER, Single, T-1(DS1), 44 Pin, Plastic, PLCC
DS2151Q/T&R 制造商:Maxim Integrated Products 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC
DS2151Q/T&R 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:*
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