- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379182 > DS2151 T1 Single-Chip Transceiver PDF資料下載
參數(shù)資料
| 型號(hào)： | DS2151 |
| 英文描述： | T1 Single-Chip Transceiver |
| 中文描述： | T1單芯片收發(fā)器 |
| 文件頁(yè)數(shù)： | 13/51頁(yè) |
| 文件大?。?/td> | 1100K |
| 代理商： | DS2151 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)當(dāng)前第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)
DS2151Q
13 of 51
(with any BPVs that might have occurred intact) via the TTIP and TRING pins. Data will continue to
pass through the receive side of the DS2151Q as it would normally and the data at the TSER input will be
ignored. Data in this loopback will pass through the jitter attenuator. RLB is used to place the DS2151Q
into “l(fā)ine” loopback which is a requirement of both ANSI T1.403 and AT&T TR62411. Please see the
DS2151Q Block Diagram in Section 1 for more details.
PAYLOAD LOOPBACK
When CCR1.1 is set to a 1, the DS2151Q will be forced into Payload LoopBack (PLB). Normally, this
loopback is only enabled when ESF framing is being performed. In a PLB situation, the DS2151Q will
loop the 192 bits of payload data (with BPVs corrected) from the receive section back to the transmit
section. The FPS framing pattern, CRC6 calculation, and the FDL bits are not looped back, they are
reinserted by the DS2151Q. When PLB is enabled, the following will occur:
1.
Data will be transmitted from the TTIP and TRING pins synchronous with RCLK instead of TCLK.
2.
All of the receive side signals will continue to operate normally.
3.
The TCHCLK and TCHBLK signals are forced low.
4.
Data at the TSER pin is ignored.
5.
The TLCLK signal will become synchronous with RCLK instead of TCLK.
FRAMER LOOPBACK
When CCR1.0 is set to a 1, the DS2151Q will enter a Framer LoopBack (FLB) mode. This loopback is
useful in testing and debugging applications. In FLB, the DS2151Q will loop data from the transmit side
back to the receive side. When FLB is enabled, the following will occur:
1.
Unless the RLB is active, an unframed all 1s code will be transmitted at TTIP and TRING.
2.
Data off the T1 line at RTIP and RRING will be ignored.
3.
The RCLK output will be replaced with the TCLK input.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS2154L | Enhanced E1 Single Chip Transceiver |
| DS2154LN | Enhanced E1 Single Chip Transceiver |
| DS2154 | WSD 151 SOLDERING STATION 230V UKWSD 151 SOLDERING STATION 230V UK; Frequency, supply max:60Hz; Frequency, supply min:50Hz; Height:101mm; Length:166mm; Power, input:150W; Temperature range:50(degree C) - 550(degree C); Voltage, |
| DS2155 | T1/E1/J1 Single-Chip Transceiver TDM/UTOPIA II Interface |
| DS2156 | T1/E1/J1 Single-Chip Transceiver TDM/UTOPIA II Interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2151DK | 功能描述:KIT TRANSCEIVER T1 DESIGN DS2151 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 過時(shí)/停產(chǎn)零件編號(hào) 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 傳感器類型:CMOS 成像，彩色（RGB） 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關(guān)產(chǎn)品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
| DS2151K | 功能描述:IC TXRX T1 1-CHIP 5V 44-PLCC RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:* |
| DS2151Q | 制造商:DAL 功能描述:2151 DAL'95 NOTES 制造商:Maxim Integrated Products 功能描述:PCM TRANSCEIVER, Single, T-1(DS1), 44 Pin, Plastic, PLCC |
| DS2151Q/T&R | 制造商:Maxim Integrated Products 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC |
| DS2151Q/T&R | 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:* |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。