參數(shù)資料
型號(hào)： DS2151
英文描述： T1 Single-Chip Transceiver
中文描述： T1單芯片收發(fā)器
文件頁(yè)數(shù)： 27/51頁(yè)
文件大?。?/td> 1100K
代理商： DS2151
DS2151Q
27 of 51
7.0 SIGNALING OPERATION
The Robbed-Bit signaling bits embedded in the T1 stream can be extracted from the receive stream and
inserted into the transmit stream by the DS2151Q. There is a set of 12 registers for the receive side (RS1
to RS12) and 12 registers on the transmit side (TS1 to TS12). The signaling registers are detailed below.
The CCR1.5 bit is used to control the robbed signaling bits as they appear at RSER. If CCR1.5 is set to
0, then the robbed signaling bits will appear at RSER in their proper position as they are received. If
CCR1.5 is set to a 1, then the robbed signaling bit positions will be forced to a 1 at RSER.
RS1 TO RS12: RECEIVE SIGNALING REGISTERS (Address=60 to 6B Hex)
(MSB)
A(8)
A(7)
A(6)
A(5)
A(4)
A(16)
A(15)
A(14)
A(13)
A(12)
A(24)
A(23)
A(22)
A(21)
A(20)
B(8)
B(7)
B(6)
B(5)
B(4)
B(16)
B(15)
B(14)
B(13)
B(12)
B(24)
B(23)
B(22)
B(21)
B(20)
A/C(8)
A/C(7)
A/C(6)
A/C(5)
A/C(4)
A/C(16)
A/C(15)
A/C(14)
A/C(13)
A/C(12)
A/C(24)
A/C(23)
A/C(22)
A/C(1)
A/C(20)
B/D(8)
B/D(7)
B/D(6)
B/D(5)
B/D(4)
B/D(16)
B/D(15)
B/D(14)
B/D(13)
B/D(12)
B/D(24)
B/D(23)
B/D(22)
B/D(21)
B/D(20)
(LSB)
A(1)
A(9)
A(17)
B(1)
B(9)
B(17)
A/C(1)
A/C(9)
A/C(17)
B/D(1)
B/D(9)
B/D(17)
A(3)
A(11)
A(19)
B(3)
B(11)
B(19)
A/C(3)
A/C(11)
A/C(19)
B/D(3)
B/D(11)
B/D(19)
A(2)
A(10)
A(18)
B(2)
B(10)
B(18)
A/C(2)
A/C(10)
A/C(18)
B/D(2)
B/D(10)
B/D(18)
RS1 (60)
RS2 (61)
RS3 (62)
RS4 (63)
RS5 (64)
RS6 (65)
RS7 (66)
RS8 (67)
RS9 (68)
RS10 (69)
RS11 (6A)
RS12 (6B)
SYMBOL
D(24)
POSITION
RS12.7
NAME AND DESCRIPTION
Signaling Bit D in Channel 24
A(1)
RS1.0
Signaling Bit A in Channel 1
Each Receive Signaling Register (RS1 to RS12) reports the incoming Robbed-Bit signaling from eight
DS0 channels. In the ESF framing mode, there can be up to 4 signaling bits per channel (A, B, C, and D).
In the D4 framing mode, there are only 2 framing bits per channel (A and B). In the D4 framing mode,
the DS2151Q will replace the C and D signaling bit positions with the A and B signaling bits from the
previous multiframe. Hence, whether the DS2151Q is operated in either framing mode, the user needs
only to retrieve the signaling bits every 3 ms. The bits in the Receive Signaling Registers are updated on
multiframe boundaries so the user can utilize the Receive Multiframe Interrupt in the Receive Status
Register 2 (SR2.7) to know when to retrieve the signaling bits. The Receive Signaling Registers are
frozen and not updated during a loss of sync condition (SR1.0=1). They will contain the most recent
signaling information before the “OOF” occurred.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS2151DK 功能描述:KIT TRANSCEIVER T1 DESIGN DS2151 RoHS:否 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 過(guò)時(shí)/停產(chǎn)零件編號(hào) 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 傳感器類(lèi)型:CMOS 成像，彩色（RGB） 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關(guān)產(chǎn)品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP
DS2151K 功能描述:IC TXRX T1 1-CHIP 5V 44-PLCC RoHS:否 類(lèi)別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:*
DS2151Q 制造商:DAL 功能描述:2151 DAL'95 NOTES 制造商:Maxim Integrated Products 功能描述:PCM TRANSCEIVER, Single, T-1(DS1), 44 Pin, Plastic, PLCC
DS2151Q/T&R 制造商:Maxim Integrated Products 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC
DS2151Q/T&R 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC RoHS:否 類(lèi)別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:*
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