參數(shù)資料
型號(hào)： DS2151
英文描述： T1 Single-Chip Transceiver
中文描述： T1單芯片收發(fā)器
文件頁(yè)數(shù)： 29/51頁(yè)
文件大小： 1100K
代理商： DS2151
DS2151Q
29 of 51
TTR1/TTR2/TTR3: TRANSMIT TRANSPARENCY REGISTERS
(Address=39 to
3B Hex)
(MSB)
CH8
CH7
CH6
CH5
CH4
CH16
CH15
CH14
CH13
CH12
CH24
CH23
CH22
CH21
CH20
(LSB)
CH1
CH9
CH17
CH3
CH11
CH19
CH2
CH10
CH18
TTR1 (39)
TTR2 (3A)
TTR3 (3B)
SYMBOL
CH24
POSITION
TTR3.7
NAME AND DESCRIPTION
Transmit Transparency Registers
.
0=this DS0 channel is not transparent
CH1
TTR1.0
1=this DS0 channel is transparent
Each of the bit positions in the Transmit Transparency Registers (TTR1/TTR2/TTR3) represents a DS0
channel in the outgoing frame. When these bits are set to a 1, the corresponding channel is transparent
(or clear). If a DS0 is programmed to be clear, no Robbed-Bit signaling will be inserted nor will the
channel have Bit 7 stuffing performed. However, in the D4 framing mode, Bit 2 will be overwritten by a
0 when a Yellow Alarm is transmitted. Also the user has the option to prevent the TTR registers from
determining which channels are to have Bit 7 stuffing performed. If the TCR2.0 and TCR1.3 bits are set
to 1, then all 24 T1 channels will have Bit 7 stuffing performed on them regardless of how the TTR
registers are programmed. In this manner, the TTR registers are only affecting which channels are to
have Robbed-Bit signaling inserted into them. Please see Figure 13-9 for more details.
TIR1/TIR2/TIR3: TRANSMIT IDLE REGISTERS
(Address=3C to 3E Hex)
(MSB)
CH8
CH7
CH6
CH5
CH16
CH15
CH14
CH13
CH12
CH24
CH23
CH22
CH21
CH20
(LSB)
CH1
CH9
CH17
CH4
CH3
CH11
CH19
CH2
CH10
CH18
TIR1 (3C)
TIR2 (3D)
TIR3 (3E)
SYMBOL
CH24
POSITION
TIR3.7
NAME AND DESCRIPTION
Transmit Idle Registers
.
0=do not insert the Idle Code into this DS0 channel
CH1
TIR1.0
1=insert the Idle Code into this channel
TIDR: TRANSMIT IDLE DEFINITION REGISTER
(Address=3F Hex)
(MSB)
TIDR7
TIDR6
TIDR5
TIDR4
(LSB)
TIDR0
TIDR3
TIDR2
TIDR1
SYMBOL
TIDR7
POSITION
TIDR.7
NAME AND DESCRIPTION
MSB of the Idle Code
TIDR0
TIDR.0
LSB of the Idle Code
Each of the bit positions in the Transmit Idle Registers (TIR1/TIR2/TIR3) represents a DS0 channel in
the outgoing frame. When these bits are set to a 1, the corresponding channel will transmit the Idle Code
contained in the Transmit Idle Definition Register (TIDR). Robbed-Bit signaling and Bit 7 stuffing will
occur over the programmed Idle Code unless the DS0 channel is made transparent by the Transmit
Transparency Registers.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS2151DK 功能描述:KIT TRANSCEIVER T1 DESIGN DS2151 RoHS:否 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 過(guò)時(shí)/停產(chǎn)零件編號(hào) 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 傳感器類型:CMOS 成像，彩色（RGB） 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關(guān)產(chǎn)品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP
DS2151K 功能描述:IC TXRX T1 1-CHIP 5V 44-PLCC RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:*
DS2151Q 制造商:DAL 功能描述:2151 DAL'95 NOTES 制造商:Maxim Integrated Products 功能描述:PCM TRANSCEIVER, Single, T-1(DS1), 44 Pin, Plastic, PLCC
DS2151Q/T&R 制造商:Maxim Integrated Products 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC
DS2151Q/T&R 功能描述:IC TXRX T1 1-CHIP 5V LP 44-PLCC RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:*
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