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參數(shù)資料
| 型號： | CYRF69213 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Programmable Radio on Chip Low Power |
| 中文描述： | 可編程片上無線電低功耗 |
| 文件頁數(shù)： | 50/85頁 |
| 文件大?。?/td> | 731K |
| 代理商： | CYRF69213 |
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CYRF69213
Document #: 001-07552 Rev. *B
Page 50 of 85
USB Serial Interface Engine (SIE)
The SIE allows the microcontroller to communicate with the
USB host at low-speed data rates (1.5 Mbps). The SIE
simplifies the interface between the microcontroller and USB
by incorporating hardware that handles the following USB bus
activity independently of the microcontroller:
Translating the encoded received data and formatting the
data to be transmitted on the bus
CRC checking and generation. Flagging the microcontroller
if errors exist during transmission
Address checking. Ignoring the transactions not addressed
to the device
Sending appropriate ACK/NAK/STALL handshakes
Identifying token type (SETUP, IN, or OUT). Setting the
appropriate token bit once a valid token is received
Placing valid received data in the appropriate endpoint
FIFOs
Sending and updating the data toggle bit (Data1/0)
Bit stuffing/unstuffing.
Firmware is required to handle the rest of the USB interface
with the following tasks:
Coordinate enumeration by decoding USB device requests
Fill and empty the FIFOs
Suspend/Resume coordination
Verify and select Data toggle values
USB Device
Table 76.USB Device Address (USBCR) [0x40] [R/W]
Bit #
Field
Read/Write
Default
The content of this register is cleared when a USB Bus Reset condition occurs
Bit 7
USB Enable
This bit must be enabled by firmware before the serial interface engine (SIE) will respond to USB traffic at the address specified
in Device Address [6:0]. When this bit is cleared, the USB transceiver enters power-down state. User’s firmware should clear
this bit prior to entering sleep mode to save power
0 = Disable USB device address and put the USB transceiver into power-down state
1 = Enable USB device address and put the USB transceiver into normal operating mode
Bits 6:0
Device Address [6:0]
These bits must be set by firmware during the USB enumeration process (for example, SetAddress) to the non-zero address
assigned by the USB host
7
6
5
4
3
2
1
0
USB Enable
R/W
0
Device Address[6:0]
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
Table 77.Endpoint 0, 1, and 2 Count (EP0CNT–EP2CNT) [0x41, 0x43, 0x45] [R/W]
Bit #
Field
Read/Write
Default
Bit 7
7
6
5
4
3
2
1
0
Data Toggle
R/W
0
Data Toggle
This bit selects the DATA packet's toggle state. For IN transactions, firmware must set this bit to the select the transmitted Data
Toggle. For OUT or SETUP transactions, the hardware sets this bit to the state of the received Data Toggle bit.
0 = DATA0
1 = DATA1
Data Valid
This bit is used for OUT and SETUP tokens only. This bit is cleared to ‘0’ if CRC, bitstuff, or PID errors have occurred. This bit
does not update for some endpoint mode settings
0 = Data is invalid. If enabled, the endpoint interrupt will occur even if invalid data is received
1 = Data is valid
Reserved
Byte Count Bit [3:0]
Byte Count Bits indicate the number of data bytes in a transaction: For IN transactions, firmware loads the count with the number of
bytes to be transmitted to the host from the endpoint FIFO. Valid values are 0 to 8 inclusive. For OUT or SETUP transactions, the
count is updated by hardware to the number of data bytes received, plus 2 for the CRC bytes. Valid values are 2–10 inclusive.
For Endpoint 0 Count Register, whenever the count updates from a SETUP or OUT transaction, the count register locks and cannot be written
by the CPU. Reading the register unlocks it. This prevents firmware from overwriting a status update on it
Data Valid
R/W
0
Reserved
Byte Count[3:0]
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
Bit 6
Bits 5:4
Bits 3:0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CYRF69213_08 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Programmable Radio on Chip Low Power |
| CYRF69213_13 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Programmable Radio on Chip Low Power |
| CYRF69213-40LFXC | 功能描述:射頻接收器 PRoC LP COM RoHS:否 制造商:Skyworks Solutions, Inc. 類型:GPS Receiver 封裝 / 箱體:QFN-24 工作頻率:4.092 MHz 工作電源電壓:3.3 V 封裝:Reel |
| CYRF69213-40LTXC | 功能描述:8位微控制器 -MCU Programmable Radio on Chip Low Power RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| CYRF69213A-40LFXC | 功能描述:8位微控制器 -MCU Programmable Radio on Chip Low Power RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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