參數(shù)資料
型號(hào)： CYRF69213
廠商： Cypress Semiconductor Corp.
英文描述： Programmable Radio on Chip Low Power
中文描述： 可編程片上無(wú)線電低功耗
文件頁(yè)數(shù)： 33/85頁(yè)
文件大?。?/td> 731K
代理商： CYRF69213
CYRF69213
Document #: 001-07552 Rev. *B
Page 33 of 85
ECO Trim Register
General-Purpose I/O Ports
The general-purpose I/O ports are discussed in the following sections.
Port Data Registers
Table 42.ECO (ECO_TR) [0x1EB] [R/W]
Bit #
Field
Read/Write
Default
This register controls the ratios (in numbers of 32-KHz clock periods) of ‘on’ time versus ‘off’ time for LVD and POR detection circuit
Bits 7:6
Sleep Duty Cycle [1:0]
0 0 = 128 periods of the Internal 32-KHz Low-speed Oscillator
0 1 = 512 periods of the Internal 32-KHz Low-speed Oscillator
1 0 = 32 periods of the Internal 32-KHz Low-speed Oscillator
1 1 = 8 periods of the Internal 32-KHz Low-speed Oscillator
7
6
5
4
3
2
1
0
Sleep Duty Cycle [1:0]
R/W
0
Reserved
R/W
0
–
0
–
0
–
0
–
0
–
0
–
0
Table 43.P0 Data Register (P0DATA)[0x00] [R/W]
Bit #
Field
Read/Write
Default
This register contains the data for Port 0. Writing to this register sets the bit values to be output on output enabled pins. Reading from this register
returns the current state of the Port 0 pins
Bit 7
P0.7 Data
Bits 6:5
Reserved
The use of the pins as the P0.6–P0.5 GPIOs and the alternative functions exist in the CYRF69213
Bits 4:2
P0.4–P0.2 Data/INT2 – INT0
In addition to their use as the P0.4–P0.2 GPIOs, these pins can also be used for the alternative functions as the Interrupt pins
(INT0–INT2). To configure the P0.4–P0.2 pins, refer to the P0.2/INT0–P0.4/INT2 Configuration Register (
Table 46
)
The use of the pins as the P0.4–P0.2 GPIOs and the alternative functions exist in the CYRF69213
Bit 1
Reserved
Bit 0
Reserved
7
6
5
4
3
2
1
0
P0.7
R/W
0
Reserved
R/W
0
Reserved
R/W
0
P0.4/INT2
R/W
0
P0.3/INT1
R/W
0
P0.2/INT0
R/W
0
Reserved
R/W
0
Reserved
R/W
0
Table 44.P1 Data Register (P1DATA) [0x01] [R/W]
Bit #
Field
Read/Write
Default
7
6
5
4
3
2
1
0
P1.7
R/W
0
P1.6/SMISO
R/W
0
P1.5/SMOSI
R/W
0
P1.4/SCLK
R/W
0
P1.3/SSEL
R/W
0
P1.2/VREG
R/W
0
P1.1/D–
R/W
0
P1.0/D+
R/W
0
[+] Feedback
相關(guān)PDF資料
PDF描述
CYRF69213-40LFXC Programmable Radio on Chip Low Power
CYRF6936-40LFXC WirelessUSB⑩ LP 2.4 GHz Radio SoC
CYS25G0101DX-ATC SONET OC-48 Transceiver
CYS25G0101DX-ATI SONET OC-48 Transceiver
CYS25G0101DX-ATXC SONET OC-48 Transceiver
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CYRF69213_08 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Programmable Radio on Chip Low Power
CYRF69213_13 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Programmable Radio on Chip Low Power
CYRF69213-40LFXC 功能描述:射頻接收器 PRoC LP COM RoHS:否 制造商:Skyworks Solutions, Inc. 類(lèi)型:GPS Receiver 封裝 / 箱體:QFN-24 工作頻率:4.092 MHz 工作電源電壓:3.3 V 封裝:Reel
CYRF69213-40LTXC 功能描述:8位微控制器 -MCU Programmable Radio on Chip Low Power RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
CYRF69213A-40LFXC 功能描述:8位微控制器 -MCU Programmable Radio on Chip Low Power RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*