參數(shù)資料
型號(hào)： CYP15G0101DXA-BBI
廠(chǎng)商： CYPRESS SEMICONDUCTOR CORP
元件分類(lèi)： 通信及網(wǎng)絡(luò)
英文描述： Single Channel HOTLink II Transceiver
中文描述： SPECIALTY TELECOM CIRCUIT, PBGA100
封裝： 11 X 11 MM, 1.40 MM HEIGHT, BGA-100
文件頁(yè)數(shù)： 2/40頁(yè)
文件大?。?/td> 527K
代理商： CYP15G0101DXA-BBI
CYP15G0101DXA
PRELIMINARY
Document #: 38-02061 Rev. **
Page 2 of 40
ed 10-bit transmission characters. Data characters are passed
from the Transmit Input Register to an embedded 8B/10B En-
coder to improve their serial transmission characteristics.
These encoded characters are then serialized and output from
dual Positive ECL (PECL) compatible differential transmis-
sion-line drivers at a bit-rate of either 10- or 20-times the input
reference clock.
The receive (RX) section of the CYP15G0101DXA Single
Channel HOTLink II consists of a byte-wide channel. The
channel accepts a serial bit-stream from one of two PECL-
compatible differential Line Receivers and, using a completely
integrated PLL Clock Synchronizer, recovers the timing infor-
mation necessary for data reconstruction. The recovered bit-
stream is deserialized and framed into characters, 8B/10B de-
coded, and checked for transmission errors. Recovered de-
coded characters are then written to an internal Elasticity Buff-
er, and presented to the destination host system. The
integrated 8B/10B Encoder/Decoder may be bypassed for
systems that present externally encoded or scrambled data at
the parallel interface.
The parallel I/O interface may be configured for numerous
forms of clocking to provide the highest flexibility in system
architecture. In addition to clocking the transmit path interfaces
from one or multiple sources, the receive interface may be
configured to present data relative to a recovered clock (out-
put) or to a local reference clock (input).
Both the transmit and the receive channels contain indepen-
dent Built-In Self-Test (BIST) pattern generators and checkers.
This BIST hardware allows at-speed testing of the high-speed
serial data paths in both transmit and receive sections, as well
as across the interconnecting links.
HOTLink II devices are ideal for a variety of applications where
parallel interfaces can be replaced with high-speed, point-to-
point serial links. Some applications include interconnecting
backplanes on basestations, switches, routers, servers and
video transmission equipment.
CYP15G0101DXA Transceiver Logic Block Diagram
x10
Serializer
Phase
Align
Buffer
Encoder
8B/10B
Decoder
8B/10B
x11
Framer
Deserializer
TX
RX
T
R
O
±
O
±
I
±
I
±
Elasticity
Buffer
T
R
相關(guān)PDF資料
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CYP15G0402DX-BGC Quad HOTLinkII SERDES
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CYP15G0101DXB 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Single-channel HOTLink II⑩ Transceiver
CYP15G0101DXB_11 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Single-channel HOTLink II Transceiver Compliant to multiple standards
CYP15G0101DXB_12 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Single-channel HOTLink IIa?￠ Transceiver
CYP15G0101DXB-BBC 功能描述:電信線(xiàn)路管理 IC Single Channel XCVR 1.5Gbps Bckplane COM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類(lèi)型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
CYP15G0101DXB-BBI 功能描述:電信線(xiàn)路管理 IC Single Channel XCVR 1.5Gbps Bckplane IND RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類(lèi)型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
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