CPU16
REFERENCE MANUAL
COMPARISON OF CPU16/M68HC11 CPU ASSEMBLY LANGUAGE
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MOTOROLA
A-15
*Motorola assemblers will automatically translate LSL mnemonics
Table A-1 M68HC16 Implementation of M68HC11 Instructions
M68HC11 Instruction
BHS
BLO
BSR
CLC
CLI
CLV
DES
DEX
DEY
INS
INX
INY
JMP
JSR
M68HC16 Implementation
Replaced by BCC
Replaced by BCS
Generates a different stack frame
Replaced by ANDP
Replaced by ANDP
Replaced by ANDP
Replaced by AIS
Replaced by AIX
Replaced by AIY
Replaced by AIS
Replaced by AIX
Replaced by AIY
IND8 addressing modes replaced by IND20 and EXT modes
IND8 addressing modes replaced by IND20 and EXT modes
Generates a different stack frame
Use ASL instructions*
Replaced by PSHM
Replaced by PSHM
Replaced by PULM
Replaced by PULM
Reloads PC and CCR only
Uses two-word stack frame
Replaced by ORP
Replaced by ORP
Replaced by ORP
Replaced by LPSTOP
CPU16 CCR bits differ from M68HC11
CPU16 interrupt priority scheme differs from M68HC11
CPU16 CCR bits differ from M68HC11
CPU16 interrupt priority scheme differs from M68HC11
Adds two to SK : SP before transfer to XK : IX
Adds two to SK : SP before transfer to YK : IY
Subtracts two from XK : IX before transfer to SK : SP
Transfers XK field to YK field
Subtracts two from YK : IY before transfer to SK : SP
Transfers YK field to XK field
Waits indefinitely for interrupt or reset
Generates a different stack frame
LSL, LSLD
PSHX
PSHY
PULX
PULY
RTI
RTS
SEC
SEI
SEV
STOP
TAP
TPA
TSX
TSY
TXS
TXY
TYS
TYX
WAI
F
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