
CPU16
REFERENCE MANUAL
COMPARISON OF CPU16/M68HC11 CPU ASSEMBLY LANGUAGE
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MOTOROLA
A-13
A.5.8
TPA
The CPU16 CCR and the M68HC11 CPU CCR are different. TPA cannot be used to
read CPU16 interrupt priority status. Use TPD to read the CPU16 CCR interrupt prior-
ity field.
A.5.8.1
M68HC11
CPU
Implementation:
A.5.8.2
CPU16
Implementation:
A.5.9 WAI
The CPU16 does not stack registers during WAI. The CPU16 acknowledges interrupts
faster out of WAI than LPSTOP. However, LPSTOP minimizes microcontroller power
consumption.
A.6 Instructions With Transparent Changes
A.6.1 RTS
The CPU16 stack frame differs from the M68HC11 CPU stack frame. PK : PC is
restored during an RTS. The PK field in the CCR is restored, then the PC value read
from the stack is decremented by two before being loaded into the PC. The PC value
is decremented because LBSR and JSR are two-word instructions. In order for pro-
gram execution to resume with the instruction immediately following them, RTS must
subtract $0002 from the stacked PK : PC value. Because BSR is a one-word instruc-
tion, it subtracts $0002 from PK : PC prior to stacking so that execution will resume
correctly after RTS.
A.6.2 TSX
The CPU16 adds two to SK : SP before the transfer to XK : IX. The M68HC11 CPU
adds one.
A.6.3 TSY
The CPU16 adds two to SK : SP before the transfer to YK : IY. The M68HC11 CPU
adds one.
7
S
7
A7
6
X
6
A6
5
H
5
A5
4
I
4
3
N
3
A3
2
Z
2
A2
1
V
1
A1
0
C
0
A0
A4
15
S
7
A7
14
MV
6
A6
13
H
5
A5
12
EV
4
A4
11
N
3
A3
10
Z
2
A2
9
V
1
A1
8
C
0
A0
7
6
IP
5
4
3
2
1
0
SM
PK
F
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