
CPU16
REFERENCE MANUAL
INSTRUCTION GLOSSARY
MOTOROLA
6-177
PULM
Operation:
Pull Multiple Registers
PULM
For mask bits 0 to 7
If bit set
(SK : SP)
+
$0002
SK : SP
Pull corresponding register
Next
Mask bits:
0
=
condition code register
1
=
extension register
2
=
index register Z
3
=
index register Y
4
=
index register X
5
=
accumulator E
6
=
accumulator D
7
=
(Reserved)
Description:
Restores contents of registers stacked by a PSHM instruction. Reg-
isters are designated by setting bits in a mask byte. PULM mask or-
der is the reverse of PSHM mask order. If SP overflow occurs as a
result of operation, the SK field is incremented.
PULM prefetches a stacked word on each iteration. If SP points to
the highest available stack address after the last register has been
restored, the prefetch will attempt to read inaccessible memory. Pull-
ing from an odd SK : SP can degrade performance. See
SECTION 8
INSTRUCTION TIMING
for more information.
Syntax:
PULM (mask)
Condition Code Register:
Set according to CCR pulled from stack. Not affected unless CCR is
pulled.
Instruction Format:
*N
=
Number of registers to be pulled.
Addressing Mode
IMM8
Opcode
35
Mask
ii
Cycles
4
+
2 (N
+
1)*
F
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n
.