- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄256350 > BX80546KG3600FA (INTEL CORP) 64-BIT, 3600 MHz, MICROPROCESSOR, CPGA604 PDF資料下載
參數(shù)資料
| 型號： | BX80546KG3600FA |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 64-BIT, 3600 MHz, MICROPROCESSOR, CPGA604 |
| 封裝： | FLIP CHIP, MICRO PGA-604 |
| 文件頁數(shù)： | 11/106頁 |
| 文件大小： | 4724K |
| 代理商： | BX80546KG3600FA |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當(dāng)前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁
12
Datasheet
Introduction
SIMD integer, and memory management operations. In addition, SSE3 instructions have been
added to further extend the capabilities of Intel processor technology. Other processor
enhancements include core frequency improvements and microarchitectural improvements.
64-bit Intel Xeon processors with 2 MB L2 cache supports Intel Extended Memory 64 Technology
(Intel EM64T) as an enhancement to Intel's IA-32 architecture. This enhancement allows the
processor to execute operating systems and applications written to take advantage of the 64-bit
extension technology. Further details on Intel Extended Memory 64 Technology and its
programming model can be found in the 64-bit Intel Extended Memory 64 Technology Software
Developer's Guide at http://developer.intel.com/technology/64bitextensions/.
64-bit Intel Xeon processors with 2 MB L2 cache are intended for high performance workstation
and server systems with up to two processors on one system bus. The 64-bit Intel Xeon MV 3.20
GHz processor is a mid-voltage processor intended for volumetrically constrained platforms. The
64-bit Intel Xeon LV 3 GHz processor is a low-voltage, low-power processor intended for
embedded and volumetrically constrained platforms. These processors are packaged in a 604-pin
Flip Chip Micro Pin Grid Array (FC-mPGA4) package and use a surface mount Zero Insertion
Force (ZIF) socket (mPGA604).
64-bit Intel Xeon processor with 2 MB L2 cache-based platforms implement independent power
planes for each system bus agent. As a result, the processor core voltage (VCC) and system bus
termination voltage (VTT) must connect to separate supplies. The processor core voltage utilizes
power delivery guidelines denoted by VRM 10.1 and the associated load line (see Voltage
Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 10.1 Design
Guidelines for further details). Implementation details can be obtained by referring to the
applicable platform design guidelines. Cost-reduced power delivery systems may be possible for
mid-voltage (MV) and low-voltage (LV) processors.
The 64-bit Intel Xeon processor with 2 MB L2 cache uses a scalable system bus protocol referred
to as the “system bus” in this document. The system bus utilizes a split-transaction, deferred reply
protocol. The system bus uses Source-Synchronous Transfer (SST) of address and data to improve
performance. The processor transfers data four times per bus clock (4X data transfer rate, as in
AGP 4X). Along with the 4X data bus, the address bus can deliver addresses two times per bus
clock and is referred to as a ‘double-clocked’ or the 2X address bus. In addition, the Request Phase
completes in one clock cycle. Working together, the 4X data bus and 2X address bus provide a data
bus bandwidth of up to 6.4 GBytes/second (6400 MBytes/second). Finally, the system bus is also
used to deliver interrupts.
1.1
Terminology
A ‘#’ symbol after a signal name refers to an active low signal, indicating a signal is in the asserted
state when driven to a low level. For example, when RESET# is low, a reset has been requested.
Conversely, when NMI is high, a nonmaskable interrupt has occurred. In the case of signals where
Table 1-1. Features of the 64-bit Intel Xeon Processor with 2 MB L2 Cache
# of Supported
Symmetric
Agents
L2 Advanced
Transfer
Cache
Front Side
Bus
Frequency
Package
64-bit Intel Xeon processor
with 2 MB L2 cache
64-bit Intel Xeon MV 3.20
GHz processor
64-bit Intel Xeon LV 3 GHz
processor
1 - 2
2 MB
800 MHz
604-pin FC-
mPGA4
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| BU-63925D0-301 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQIP70 |
| BU-63925F0-300 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP70 |
| BU-63925G3-201 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDSO70 |
| BU-64703B3-200 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CBGA80 |
| BU-64703B8-192 | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CBGA80 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BX80546KG3600FUS L8P3 | 制造商:Intel 功能描述:MPU XEON NETBURST 64BIT 90NM 3.6GHZ 604PIN FCMPGA4 - Boxed Product (Development Kits) |
| BX80546PE2800E | 制造商:Intel 功能描述:P4 Socket 478 2.8GHzE 533MHz with fan |
| BX80546PG3000E S L7PM | 制造商:Intel 功能描述: |
| BX80546PG3000E S L8JZ | 制造商:Intel 功能描述: |
| BX80546PG3200E | 制造商:Intel 功能描述:MPU PENTIUM 4 PROCESSOR NETBURST 90NM 3.2GHZ - Boxed Product (Development Kits) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。