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參數(shù)資料
| 型號： | AX88780_07 |
| 廠商： | ASIX Electronics Corporation |
| 英文描述： | IC,D/A CONVERTER,MC144110DW, 6-BIT,5-15V,SOIC-20,3-7US SER. |
| 中文描述： | 高性能非PCI單芯片32位10/100M自適應(yīng)快速以太網(wǎng)控制器 |
| 文件頁數(shù)： | 19/55頁 |
| 文件大?。?/td> | 379K |
| 代理商： | AX88780_07 |
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AX88780
19
ASIX ELECTRONICS CORPORATION
1 = enable
0 = disable
Reserved
Watch Dog Timer Interrupt Mask
When this bit is enabled, a watch dog timer expired interrupt request set in
bit1 of Interrupt Status Register will make AX88780 to issue an interrupt to
host
1 = enable
0 = disable
Rx Buffer Full Interrupt Mask
When this bit is enabled, a RX buffer full interrupt request set in bit 0 of
Interrupt Status Register will make AX88780 to issue an interrupt to host.
1 = enable
0 = disable
2
1
-
R/W
R/W
0
0
DOGIM
0
RXFULIM
R/W
0
4.3 ISR--Interrupt Status Register
Offset Address = 0xFC08 Default = 0x0000_0000
Field Name
Type
Default
31:6
-
R
All 0’s
5
PHYIG
R/W
0
Description
Reserved
PHY Interrupt Generation
If this bit is set to ‘1’ it means there is an interrupt request from PHY. MAC will
forward this interrupt to system. Meantime driver should poll PHY and adopt
proper procedure. Write ‘1’ to this bit to clear this request status.
1 = have interrupt request
0 = no interrupt request
Receive Packet Interrupt Generation
If this bit is set to ‘1’ it means MAC receives a packet or (packets) from cable.
The packet is kept in RX buffer. Write ‘1’ to this bit to clear this request status.
1 = have received packet
0 = no received packet
Finish Transmitting Packet Interrupt
If this bit is set to ‘1’ it means MAC had transmitted packet to cable. Write ‘1’ to
this bit to clear this request status.
1 = finish transmitting
0 = none
Reserved
Watch Dog Timer Expired Interrupt
If this bit is set to ‘1’ it means the WATCH DOG timer is expired. AX88780 will
issue an interrupt to host. Write ‘1’ to this bit to clear this request status. The
expired duration can refer to DOGTHD0 and DOGTHD1 registers.
1 = timer expired happens
0 = none
RX Buffer Full Interrupt
If this bit is set to ‘1’ it means RX buffer is full and no more packets will be
received until packets are read out. Write ‘1’ to this bit to clear this request status.
1 = RX buffer full
0 = None
4
RPIG
R/W
0
3
FTPI
R/W
0
2
1
-
R/W
R/W
0
0
WDTEI
0
RXFULI R/W
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AX88782 | 制造商:ASIX 制造商全稱:ASIX 功能描述:ASIX Multi-Port Ethernet Controller |
| AX88783 | 制造商:ASIX 制造商全稱:ASIX 功能描述:ASIX Multi-Port Ethernet Controller |
| AX88790L | 制造商:ASIX 制造商全稱:ASIX 功能描述:10/100BASE 3-in-1 PCMCIA Fast Ethernet Controller |
| AX88796 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3-in-1 Local Bus Fast Ethernet Controller |
| AX88796ALF | 制造商:ASIX 功能描述:10/100 MAC,COMMERCIAL 128PIN |
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