
AX88780
17
ASIX ELECTRONICS CORPORATION
4.0 Register Description
There are some registers located from offset 0xFC00 to 0xFCFF. All of the registers are 32-bit boundary alignment, but
only low 16-bit are available (exception 0xFC54). For reserved bits, don’t set them in normal operation.
Table 8: MAC Register Mapping
Offset
Name
Description
0xFC00
CMD
Command Register
0xFC04
IMR
Interrupt Mask Register
0xFC08
ISR
Interrupt Status Register
0xFC10
TX_CFG
TX Configuration Register
0xFC14
TX_CMD
TX Command Register
0xFC18
TXBS
TX Buffer Status Register
0xFC1C
PHY_CTRL
Internal PHY Control Register
*
0xFC20
TXDES0
TX Descriptor0 Register
0xFC24
TXDES1
TX Descriptor1 Register
0xFC28
TXDES2
TX Descriptor2 Register
0xFC2C
TXDES3
TX Descriptor3 Register
0xFC30
RX_CFG
RX Configuration Register
0xFC34
RXCURT
RX Current Pointer Register
0xFC38
RXBOUND
RX Boundary Pointer Register
0xFC40
MAC_CFG0
MAC Configuration0 Register
0xFC44
MAC_CFG1
MAC Configuration1 Register
0xFC48
MAC_CFG2
MAC Configuration2 Register
0xFC4C
MAC_CFG3
MAC Configuration3 Register
0xFC54
TXPAUT
TX Pause Time Register
0xFC58
RXBTHD0
RX Buffer Threshold0 Register
0xFC5C
RXBTHD1
RX Buffer Threshold1 Register
0xFC60
RXFULTHD
RX Buffer Full Threshold Register
0xFC68
MISC
Misc. Control Register
0xFC70
MACID0
MAC ID0 Register
*
0xFC74
MACID1
MAC ID1 Register
*
0xFC78
MACID2
MAC ID2 Register
*
0xFC7C
TXLEN
TX Length Register
0xFC80
RXFILTER
RX Packet Filter Register
0xFC84
MDIOCTRL
MDIO Control Register
0xFC88
MDIODP
MDIO Data Port Register
0xFC8C
GPIO_CTRL
GPIO Control Register
*
0xFC90
RXINDICATOR
Receive Indicator Register
0xFC94
TXST
TX Status Register
0xFCA0
MDCLKPAT
MDC Clock Pattern Register
0xFCA4
RXCHKSUMCNT
RX IP/UDP/TCP Checksum Error Counter
0xFCA8
RXCRCNT
RX CRC Error Counter
0xFCAC
TXFAILCNT
TX Fail Counter
0xFCB0
PROMDPR
EEPROM Data Port Register
0xFCB4
PROMCTRL
EEPROM Control Register
0xFCB8
MAXRXLEN
MAX. RX packet Length Register
0xFCC0
HASHTAB0
Hash Table0 Register
*
0xFCC4
HASHTAB1
Hash Table1 Register
*
0xFCC8
HASHTAB2
Hash Table2 Register
*
0xFCCC
HASHTAB3
Hash Table3 Register
*
0xFCE0
DOGTHD0
Watch Dog Timer Threshold0 Register
0xFCE4
DOGTHD1
Watch Dog Timer Threshold1 Register
0xFCEC
SOFTRST
Software Reset Register
*Note: It is not affected by software reset
Default value
0x0000_0201
0x0000_0000
0x0000_0000
0x0000_0040
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0101
0x0000_0000
0x0000_07FF
0x0000_8157
0x0000_6000
0x0000_0100
0x0000_060E
0x001F_E000
0x0000_0300
0x0000_0600
0x0000_0100
0x0000_0013
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_05FC
0x0000_0004
0x0000_0000
0x0000_0000
0x0000_0003
0x0000_0000
0x0000_0000
0x0000_8040
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0600
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_FFFF
0x0000_0000
0x0000_0003