參數(shù)資料
型號(hào)： AX88780_07
廠商： ASIX Electronics Corporation
英文描述： IC,D/A CONVERTER,MC144110DW, 6-BIT,5-15V,SOIC-20,3-7US SER.
中文描述： 高性能非PCI單芯片32位10/100M自適應(yīng)快速以太網(wǎng)控制器
文件頁(yè)數(shù)： 12/55頁(yè)
文件大?。?/td> 379K
代理商： AX88780_07
AX88780
12
ASIX ELECTRONICS CORPORATION
2.7 Miscellaneous
Table 6: Miscellaneous signals group
Pin Name
LINKLED
Type
IO3,
12mA,
PD
Pin No.
55
Pin Description
In power-on reset phase, this pin will be latched by AX88780 to determine that system
operates in 32 or 16-bit mode. High state is 16-bit mode and low state is 32-bit mode.
The default is in 32-bit mode.
Upon finishing reset status, if bit11 of PHY_CTRL register is enabled, this pin stands
for:
Link: indicates a good link status, active low in 16-bit mode and active high in 32-bit
mode. The link indicator only works under bit11 of PHY_CTRL register set by
driver.
Traffic: indicates the traffic status and flashes while in TX or RX state.
In power-on reset phase, this pin will be latched by AX88780 to determine whether
AX88780 swaps the data or not. If the high state, AX88780 will swap the data
(big-endian). The default is little-endian.
Upon finishing reset stage, if bit12 PHY_CTRL register is enabled, this pin stands for
speed mode. In little-endian mode, low indicates that PHY is in 10BASE-TX mode,
and high state indicates PHY is in 100BASE-T mode. In big-endian mode, low
indicates that PHY is in 100Mbase-T mode and high state indicates PHY is in
10Base-TX mode. The speed indicator only works under bit12 of PHY_CTRL register
set by driver.
This pin is tied to ground for normal operation.
SPDLED
IO3,
12mA,
PD
54
NA
I3
51
TEST0
I3, PD
52
Pull down (by 4.7K) or floating for normal operation.
TEST1
I3, PD
53
Pull down (by 4.7K) or floating for normal operation.
XTLN
I25
90
25Mhz crystal or oscillator clock input. The recommended reference frequency is
25Mhz +/- 0.005% (i.e. 25Mhz +/- 1250hz).
This input pin is only 2.5V tolerant and should not apply 3.3V clock signal directly to
this pin if an external oscillator is used.
25MHz crystal clock output. For 25MHz oscillator clock, this pin should be kept
floating.
Pull-up for normal operation.
XTLP
O2
91
RSTPB
I25
97
IBREF_WESD I25
88
Connect a 12.3Kohm resistor to ground.
NC
O
67,68
No connection
2.8 Power/ground pin
Table 7: Power/Ground pins group
Pin Name Type
VCC33
VCC25
GND
VCC25A
GNDA
Pin No.
Pin Description
VCC3 1,13,40, 105, 119
VCC2 4,20,27,35,57,60,64,72,78,107,117,123
GND
8, 56, 73,106
VCC2 81,85,89,96,98,100
GND
82,86,87,92,95,99,101
Digital 3.3V power
Digital 2.5V power
Digital ground
2.5V power for PHY analog par
t
Analog ground
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