參數(shù)資料
型號(hào)： AT_8032
廠商： Atmel Corp.
英文描述： 8-bit Embedded Microcontroller Core(8位嵌入式基于工業(yè)標(biāo)準(zhǔn)軟件兼容的微控制器)
中文描述： 8位嵌入式微控制器核心（8位嵌入式基于工業(yè)標(biāo)準(zhǔn)軟件兼容的微控制器）
文件頁(yè)數(shù)： 5/39頁(yè)
文件大小： 532K
代理商： AT_8032
AT_8032 Core
5
External Data Memory
The AT_8032 can be configured to interface with an exter-
nal data memory of up to 64K Bytes or 16-bit words. One-
byte addresses are generally used in conjunction with one
(or more) I/O lines to page the RAM. If the entire 64K
address space is to be accessed, two-byte addresses are
used.
Figure 6 represents a hardware configuration that allows
access to 2K bytes of external RAM. In this case, the
AT_8032 executes from the internal ROM. Port 0 functions
as multiplexed address/data bus to the RAM, and 3 lines of
Port 2 are used to page the RAM. The AT_8032 generates
RD and WR signals as required during external RAM
access.
Figure 6.
Accessing External Data Memory
Internal Data Memory
The internal data memory is divided into three different
areas: one for the lower 128 bytes, one for the upper 128
bytes and the third 128 bytes for the Special Function Reg-
ister (SFR) space.
Internal data memory addresses are always 1 byte wide
(the address space is only 256 bytes). This is increased to
384 bytes by the following mechanism: direct addresses
higher than 7FH access one memory space (the SFRs),
but indirect addresses higher than 7FH access a different
memory space. The address space from 00H to 7FH can
be accessed by both direct and indirect addressing.
Lower 128 Bytes of Internal RAM
The lower 128 bytes of internal RAM can be addressed by
direct or by indirect addressing.
The lowest 32 bytes of the internal RAM are grouped into 4
banks of 8 registers. Program instructions refer to the regis-
ters as R0 through R7. Two bits in the Program Status
Word choose the register bank that is to be used. Because
register instructions are shorter than instructions that use
direct addresses, the code spaces are used more
efficiently.
Figure 7.
The Lower 128 Bytes of Internal RAM
P2
8032
ALE
P0
ADDR
OE
PS
WE
WR
RD
DATA RAM
Page
Bits
D
Q
Latch
I/O
7FH
2FH
1FH
17H
0FH
07H
0
08H
10H
18H
20H
00
01
10
11
Stack Pointer
Reset Value
Bit-Addressable Space
(Bit Address 00H-7FH)
Bank Select
Bits in PSW
30H
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