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參數資料
| 型號： | AT_8032 |
| 廠商： | Atmel Corp. |
| 英文描述： | 8-bit Embedded Microcontroller Core(8位嵌入式基于工業(yè)標準軟件兼容的微控制器) |
| 中文描述： | 8位嵌入式微控制器核心（8位嵌入式基于工業(yè)標準軟件兼容的微控制器） |
| 文件頁數： | 35/39頁 |
| 文件大?。?/td> | 532K |
| 代理商： | AT_8032 |
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AT_8032 Core
35
Notes:
1. The timer is turned ON/OFF by setting/clearing bit TR1 in the software.
2. The timer is turned ON/OFF by the 1-to-0 transition on INT1 (P3.2) when TR1 = 1 (hardware control).
TCON: Timer/Counter 0/1 Control Register
Table 24.
Timer/Counter 1 as a Timer
Mode
Timer 1 Function
Internal TMOD Control
(1)
External TMOD Control
(2)
0
13-bit Timer
00H
80H
1
16-bit Timer
10H
90H
2
8-bit Auto-Reload
20H
A0H
3
Does not run
30H
B0H
Table 25.
Timer/Counter 1 as a Counter
Mode
Counter 1 Function
Internal TMOD Control
(1)
External TMOD Control
(2)
0
13-bit Timer
40H
C0H
1
16-bit Timer
50H
D0H
2
8-bit Auto-Reload
60H
E0H
3
One 8-bit Counter
70H
F0H
Table 26.
Timer/Counter 0 and 1 Control Register
MSB
LSB
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Table 27.
Timer/Counter 0 and 1 Control Register Bit Functions
Symbol
Position
Function
TF1
TCON.7
Timer 1 Overflow Flag. Set by hardware when Timer/Counter 1 overflows. Cleared by hardware
as the processor vectors to the interrupt service routine.
TR1
TCON.6
Timer 1 Run Control Bit. Set/cleared by software to turn Timer/Counter 1 ON/OFF.
TF0
TCON.5
Timer 0 Overflow Flag. Set by hardware when the Timer/Counter 0 overflows. Cleared by
hardware as the processor vectors to the interrupt service routine.
TR0
TCON.4
Timer 0 Run Control bit. Set/cleared by software to turn Timer/Counter 0 ON/OFF.
IE1
TCON.3
External Interrupt 1 Edge Flag. Set by hardware when External Interrupt 1 edge is detected.
Cleared by hardware when interrupt is processed.
IT1
TCON.2
Interrupt 1 Type Control Bit. Set/cleared by software to specify falling edge/low level triggered
External Interrupt 1.
IE0
TCON.1
External Interrupt 0 Edge Flag. Set by hardware when External Interrupt 0 edge is detected.
Cleared by hardware when interrupt is processed.
IT0
TCON.0
Interrupt 0 Type Control Bit. Set/cleared by software to specify falling edge/low level triggered
External Interrupt 0.
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