
AT_8032 Core
13
Addressing Modes
The AT_8032 has the following addressing modes:
Direct Addressing
The direct addressing mode provides an 8-bit address field
in the instruction that locates the operand. Only internal
RAM and SFRs can have direct addressing.
Indirect Addressing
In the indirect addressing mode, the addresses of the oper-
ands are kept in a register specified by the instruction.
Internal and external RAM can be indirectly addressed.
The address register for 8-bit indirect addresses can be R0
or R1 of the selected register bank, or the Stack Pointer.
16-bit indirect addresses are located in the 16-bit Data
Pointer Register (DPTR).
Register Instructions
Certain instructions provide access to the register banks
(R0 - R7). They carry a 3-bit register specification inside
the opcode and are code-efficient due to the elimination of
the address byte. One of the four register banks is selected
at execution time by the two bank-select bits in the Pro-
gram Status Word (PSW).
Register-specific Instructions
Some instructions are characteristic of certain register(s).
The opcode instead of having an address byte points to
these register(s). This group includes instructions that refer
to the Accumulator (A).
Immediate Constants
Certain instructions make it possible to put the value of a
constant after the opcode.
Indexed Addressing
Indexed addressing is used for reading look-up tables in
program memory. A 16-bit Base Register (B) points to the
base of the table, and the accumulator is set up with the
table entry number. The entry address in program memory
is given by the sum of the accumulator and the base
pointer.
Indexed addressing is also used for Case Jump instruc-
tions. In this case, the sum of the base pointer and the
accumulator give the destination address of the jump
instructions.
Instruction Groups
The AT_8032 has the following groups of instructions:
Arithmetic Instructions
The instruction table contains a wide range of arithmetic
instructions with various addressing modes. Any byte in the
internal data memory space can be incremented or decre-
mented without going through the accumulator.
Logical Instructions
The accumulator-specific logical instructions work in one
Machine Cycle (MC). The other instructions use two MCs.
Boolean operations can be done on any byte in the lower
128 bytes of internal data memory (or the SFR space)
using direct addressing, without the help of the
accumulator.
The rotate instructions (RL A, RLC A, etc.) shift the con-
tents of the accumulator one bit to the left or to the right.
For a left rotation, the MSB moves into the LSB position.
For a right rotation the LSB moves to the MSB position.
The SWAP A instructions interchange the high and low nib-
bles within the accumulator. This is a useful operation in
BCD manipulation.
Data Transfer
A 16-bit MOV is included in the data transfer instructions. It
can be used to initialize the data pointer (DPTR) which
looks up the tables in the program memory. Note that the
data pointer can also be used to provide a 16-bit address
for access to external data memory.
The accumulator and the addressed byte exchange data
by XCH instructions. XCH instructions are also included to
exchange data but only in the low nibbles.
Stack
In the AT_8032, the stack is located in the internal RAM.
The reset value of the Stack Pointer is 07H. PUSH and
POP function with direct addressing to identify the byte
being saved or restored. The stack itself can be reached by
indirect addressing using the SP register. The stack can
extend into the upper bytes of internal memory, but not into
the SFR space.
External RAM
Data transfer instructions access the external data memory
only through an indirect addressing mode. The best solu-
tion is the use of a one- or two-byte address. An
intermediate value such as a 13-bit address is an unsuit-
able solution. If only a few Kbytes of external RAM are