參數(shù)資料
型號(hào)： AT_8032
廠商： Atmel Corp.
英文描述： 8-bit Embedded Microcontroller Core(8位嵌入式基于工業(yè)標(biāo)準(zhǔn)軟件兼容的微控制器)
中文描述： 8位嵌入式微控制器核心（8位嵌入式基于工業(yè)標(biāo)準(zhǔn)軟件兼容的微控制器）
文件頁(yè)數(shù)： 36/39頁(yè)
文件大小： 532K
代理商： AT_8032
AT_8032 Core
36
T2CON: Timer/Counter 2 Control Register
Table 28.
Timer/Counter 2 Control Register
MSB
LSB
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
C/T2
CP/RL2
Table 29.
Timer/Counter 2 Control Register Bit Functions
Symbol
Position
Function
TF2
T2CON.7
Timer 2 Overflow Flag, set by a Timer 2 overflow and must be cleared by software. TF2 will not be
set when either RCLK or TCLK = 1.
EXF2
T2CON.6
Timer 2 External Register, set when either a capture or reload is caused by a negative transition
on T2EX and EXEN2 = 1. When the Timer 2 Interrupt is enabled, EXF2 = 1 will cause the
AT_8032 to vector to the Timer 2 Interrupt Routine. EXF2 must be cleared by software.
RCLK
T2CON.5
Receive Clock Register. When set, causes the serial port to use Timer 2 overflow pulses for the
receive clock in Modes 1 and 3. RCLK = 0 causes Timer 1 overflow to be used for the receive
clock.
TCLK
T2CON.4
Transmit Clock Register. When set, causes the serial port to use Timer 2 overflow pulses for the
transmit clock in Modes 1 and 3. TCLK = 0 causes Timer 1 overflow to be used for the transmit
clock.
EXEN2
T2CON.3
Timer 2 External Enable flag. When set, allows a capture or reload to occur as a result of a
negative transition on T2EX if Timer 2 is not being used to clock the serial port. EXEN2 = 0
causes Timer 2 to ignore events at T2EX.
TR2
T2CON.2
Start/stop control for Timer 2. Logic 1 starts the timer.
C/T2
T2CON.1
Timer or counter select (Timer 2). C/T2 = 0 selects internal timer (OSC/12). C/T2 = 1 selects
external event counter (falling edge triggered).
CP/RL2
T2CON.0
Capture/Reload flag. When set, captures will occur on negative transitions at T2EX if EXEN2 = 1.
When cleared, auto-reload will occur either with Timer 2 overflows or negative transitions at T2EX
when EXEN2 = 1. When either RCLK = 1 or TCLK = 1, this bit is ignored and the timer is forced
to auto-reload on Timer 2 overflow.
Table 30.
Timer 2 Operating Modes
RCLK + TCLK
CP/RL2
TR2
Mode
0
0
1
16-bit Auto-reload
0
1
1
16-bit Capture
1
x
1
Baud rate generator
x
x
0
(off)
Table 31.
Timer 2 as a Timer
Mode
Internal T2CON Control
(1)
External T2CON Control
(2)
16-bit Auto-reload
00H
08H
16-bit Capture
01H
09H
Baud rate generator receive and
transmit same baud rate
34H
36H
Receive only
24H
26H
Transmit only
14H
16H
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