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參數(shù)資料
| 型號： | AT_8032 |
| 廠商： | Atmel Corp. |
| 英文描述： | 8-bit Embedded Microcontroller Core(8位嵌入式基于工業(yè)標(biāo)準(zhǔn)軟件兼容的微控制器) |
| 中文描述： | 8位嵌入式微控制器核心（8位嵌入式基于工業(yè)標(biāo)準(zhǔn)軟件兼容的微控制器） |
| 文件頁數(shù)： | 25/39頁 |
| 文件大小： | 532K |
| 代理商： | AT_8032 |
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AT_8032 Core
25
Using Timer 2
Timer 2 is selected in baud rate generator mode by setting
TCLK and/or RCLK in T2CON. The baud rates can be dif-
ferent for transmit and receive operations.
The baud rate is determined by Timer 2
’
s overflow rate as
follows:
Baud Rate = (Timer 2 Overflow Rate) /16
Timer 2 baud-rate generator mode is similar to its auto-
reload mode, in that a rollover in TH2 causes the Timer 2
registers to be reloaded with the 16-bit value in registers
RCAP2H and RCAP2L, which are preset by software.
The timer can be configured for either timer or counter
operation. In the most typical applications, it is configured
for timer operation. Timer operation is different for Timer 2
when used as a baud rate generator. Usually, it increments
every machine cycle (like a timer). As a baud rate genera-
tor, it increments at every state time. In this case, it gives
the following baud rate:
Baud Rate = (Oscillator Frequency) / (32 x (65536 -
(RCAP2H,RCAP2L)))
where
(RCAP2H, RCAP2L)
is the contents of RCAP2H and
RCAP2L taken as a 16-bit unsigned integer.
Timer 2 as a baud rate generator is shown in Figure 19.
Rollover in TH2 does not set TF2, and does not generate
an interrupt. Therefore, the Timer 2 interrupt does not have
to be disabled when Timer 2 is in baud rate generator
mode. Note also that if EXEN2 is set, a 1-to-0 transition in
T2EX will set EXF2 but will not cause a reload from
(RCAP2H, RCAP2L) to (TH2, TL2). Thus when Timer 2 is
in use as a baud rate generator, T2EX can be used as an
extra external interrupt, if desired.
When Timer 2 is running (TR2 = 1) in timer function in baud
rate generator mode, no attempt should be made to read or
write TH2 or TL2. Under these conditions the timer is being
incremented at every state time, and the results of a read
and write may not be accurate. The RCAP registers may
be read but should not be written, because a write might
overlap a reload and cause write and/or reload errors.
Timer 2 should be disabled before accessing the Timer 2 or
RCAP registers.
Operation in Mode 0
Eight data bits are transmitted/received. The baud rate is
fixed at one twelfth of the oscillator frequency.
Transmission
Transmission is initiated by any instruction that uses SBUF
as a destination register. The
“
write to SBUF
”
signal at
S6P2 initiates an 8-bit parallel load from the data bus to the
transmit shift register. It also loads a 1 into the 9th position
of the transmit shift register. In addition, it informs the TX
control block to begin a transmission. The internal timing is
such that one full machine cycle elapses between
“
write to
SBUF
”
, and the activation of SEND.
SEND connects the output of the transmit shift register to
the alternate output function line of P3.0, and also connects
SHIFT CLOCK to the alternate output function line of P3.1.
SHIFT CLOCK is low during S3, S4 and S5 of every
machine cycle, and high during S1, S2 and S6. At S6P2 of
every machine cycle in which SEND is active, the contents
of the transmit shift register are shifted to the right one
position.
As data bits shift out to the right, zeroes come in from the
left. When the MSB of the data byte is at the output position
of the shift register, then the 1 that was initially loaded into
the 9th position, is just to the left of the MSB, and all posi-
tions to the left of that contain zeroes. These conditions flag
the TX Control block to do one last shift and then de-acti-
vate SEND and set TI. Both of these actions occur at S1P1
of the 10th machine cycle after
“
write to SBUF
”
.
Reception
Reception is initiated by the condition REN = 1 and RI = 0.
At S6P2 of the next machine cycle, the RX Control unit
writes the bits 11111110 to the receive shift register, and in
the next clock phase activates RECEIVE.
RECEIVE connects SHIFT CLOCK to the alternate output
function line of P3.1. SHIFT CLOCK makes transitions at
S3P1 and S6P1 of every machine cycle in which RECEIVE
is active; the contents of the receive shift register are
shifted to the left one position. The value that comes in
from the right is the value that was sampled on the P3.0 pin
at S5P2 of the same machine cycle.
As data bits come in from the right, ones shift out to the left.
When the 0 that was initially loaded into the far right posi-
tion arrives at the far left position of the shift register, it flags
the RX Control Block to do one last shift and load SBUF. At
S1P1 of the 10th machine cycle after the write to SCON
that cleared RI, RECEIVE is cleared and RI is set.
Operation in Mode 1
Ten bits are transmitted (through TXD), or received
(through RXD): a start bit (0), 8 data bits (LSB first), and a
stop bit (1). On receive, the stop bit goes into RB8 in
SCON. The baud rate is determined either by the Timer 1
overflow rate, or the Timer 2 overflow rate, or both (one for
transmit and the other for receive).
Transmission
Transmission is initiated by any instructions that use SBUF
as a destination register. The
“
write to SBUF
”
signal also
loads a 1 into the 9th bit position of the transmit shift regis-
ter and flags the TX Control unit that a transmission is
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