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參數(shù)資料
| 型號： | AT_8032 |
| 廠商： | Atmel Corp. |
| 英文描述： | 8-bit Embedded Microcontroller Core(8位嵌入式基于工業(yè)標(biāo)準(zhǔn)軟件兼容的微控制器) |
| 中文描述： | 8位嵌入式微控制器核心（8位嵌入式基于工業(yè)標(biāo)準(zhǔn)軟件兼容的微控制器） |
| 文件頁數(shù)： | 32/39頁 |
| 文件大小： | 532K |
| 代理商： | AT_8032 |
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AT_8032 Core
32
IP: Interrupt Priority Register
The Interrupt Priority register (IP) is bit addressable. If the bit is 0, the corresponding interrupt has a lower priority, and if the
bit is 1 the corresponding interrupt has a higher priority. When a higher-priority interrupt service routine is in progress, it
cannot be interrupted by another interrupt at a lower or the same level of priority. The IP register contains two unimple-
mented bits: IP.7 and IP.6.
Table 14.
Interrupt Priority Register
MSB
LSB
X
X
PT2
PS
PT1
PX1
PT0
PX0
Table 15.
Interrupt Priority Register Bit Functions
Symbol
Position
Function
IP7
Reserved
IP6
Reserved
PT2
IP5
Defines the Timer 2 Interrupt priority level. PT2 = 1 sets it to the higher priority level.
PS
IP4
Defines the serial port (UART) Interrupt priority level. PS = 1 sets it to the higher priority level.
PT1
IP3
Defines the Timer 1 Interrupt priority level. PT1 = 1 sets it to higher priority level.
PX1
IP2
Defines the External Interrupt 1 priority level. PX1 = 1 sets it to higher priority level.
PT0
IP1
Defines the Timer 0 Interrupt priority level. PT0 = 1 sets it to higher priority level
PX0
IP0
Defines the External Interrupt 0 priority level. PX0 = 1 sets it to higher priority level.
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