- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378406 > ARM60 (Zarlink Semiconductor Inc.) Low power, general purpose 32-bit RISC microprocessor PDF資料下載
參數(shù)資料
| 型號(hào)： | ARM60 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Low power, general purpose 32-bit RISC microprocessor |
| 中文描述： | 低功耗，通用32位RISC微處理器 |
| 文件頁數(shù)： | 80/120頁 |
| 文件大?。?/td> | 1275K |
| 代理商： | ARM60 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁當(dāng)前第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁
P60ARM-B
76
An instruction prefetch occurs at the same time as the above operation, and the program counter is
incremented.
When the shift length is specified by a register, an additional datapath cycle occurs before the above
operation to copy the bottom 8 bits of that register into a holding latch in the barrel shifter. The instruction
prefetch will occur during this first cycle, and the operation cycle will be internal (ie will not request
memory). This internal cycle can be merged with the following sequential access by the memory manager
as the address remains stable through both cycles.
The PC may be one or more of the register operands. When it is the destination external bus activity may
be affected. If the result is written to the PC, the contents of the instruction pipeline are invalidated, and the
address for the next instruction prefetch is taken from the ALU rather than the address incrementer. The
instruction pipeline is refilled before any further execution takes place, and during this time exceptions are
locked out, although will be recorded for subsequent action after the pipeline has been refilled.
PSR Transfer operations exhibit the same timing characteristics as the data operations except that the PC is
never used as a source or destination register. The cycle timings are shown below
Table 8: Data Operation
Instruction Cycle Operations
.
Cycle
Address
nBW
nRW
Data
nMREQ
SEQ
nOPC
normal
1
pc+8
1
0
(pc+8)
0
1
0
pc+12
dest=pc
1
pc+8
1
0
(pc+8)
0
0
0
2
alu
1
0
(alu)
0
1
0
3
alu+4
1
0
(alu+4)
0
1
0
alu+8
shift(Rs)
1
pc+8
1
0
(pc+8)
1
0
0
2
pc+12
1
0
-
0
1
1
pc+12
shift(Rs)
1
pc+8
1
0
(pc+8)
1
0
0
dest=pc
2
pc+12
1
0
-
0
0
1
3
alu
1
0
(alu)
0
1
0
4
alu+4
1
0
(alu+4)
0
1
0
alu+8
Table 8: Data Operation Instruction Cycle Operations
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ARM610 | General purpose 32-bit microprocessor |
| ARM7TDMI | 32-Bit Advanced RISC Machines(ARM) Microprocessor Core(32位ARM微處理器內(nèi)核芯片) |
| ART10012T | 28V Input, Triple Output / HYBRID - HIGH RELIABILITY RADIATION HARDENED DC/DC CONVERTER |
| ART10015T | 28V Input, Triple Output / HYBRID - HIGH RELIABILITY RADIATION HARDENED DC/DC CONVERTER |
| ART2812T | 28V Input, Triple Output / HYBRID - HIGH RELIABILITY RADIATION HARDENED DC/DC CONVERTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ARM607 | 制造商:Master Appliance Corp 功能描述:Armature, With Retaining Rings, 120V (HG 制造商:Master Appliance Corp 功能描述:Armature, With Retaining Rings, 120V (HG-751B) |
| ARM-607 | 制造商:Master Appliance Corp 功能描述:Nozzle Shield; HG-751B heat gun 制造商:Master Appliance 功能描述:Heat Gun,Armature W/Retaining Ring For Hg-751B 120V, Hg-501A-D |
| ARM610 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:General purpose 32-bit microprocessor |
| ARM7-009 | 制造商:Gravitech 功能描述:ARM7 LPC2378 W/2.8" TCH SCRN LCD BLU |
| ARM720T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:General-purpose 32-bit Microprocessor with 8KB cache, enlarged Write buffer, and Memory Management Unit (MMU) combined in a single chip |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。