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參數(shù)資料
| 型號： | ADSP-21992YST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Mixed Signal DSP Controller With CAN |
| 中文描述： | 16-BIT, 100 MHz, OTHER DSP, PQFP176 |
| 封裝： | LQFP-176 |
| 文件頁數(shù)： | 14/49頁 |
| 文件大小： | 602K |
| 代理商： | ADSP-21992YST |
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For current information contact Analog Devices at (781) 937-1799
ADSP-21992
August 2002
This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Analog
Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
14
REV. PrA
PRELIMINARY TECHNICAL DATA
Booting Modes
The ADSP-21992 supports a number of different boot
modes that are controlled by the three dedicated hardware
boot mode control pins (BMODE2, BMODE1 and
BMODE0). The use of 3 boot mode control pins means
that up to 8 different boot modes are possible. Of these only
5 modes are valid on the ADSP-21992. The ADSP-21992
exposes the boot mechanism to software control by
providing a nonmaskable boot interrupt that vectors to the
start of the on chip ROM memory block (at address
0xFF0000). A boot interrupt is automatically initiated
following either a hardware initiated reset, via the RESET
pin, or a software initiated reset, via writing to the Software
Reset register Following either a hardware or a software
reset, execution always starts from the boot ROM at address
0xFF0000, irrespective of the settings of the BMODE2,
BMODE1 and BMODE0 pins. The dedicated BMODE2,
BMODE1 and BMODE0 pins are sampled during
hardware reset.
The particular boot mode for the ADSP-21992 associated
with the settings of the BMODE2, BMODE1, BMODE0
pins is defined in Table 1.
Instruction Set Description
The ADSP-21992 assembly language instruction set has an
algebraic syntax that was designed for ease of coding and
readability. The assembly language, which takes full
advantage of the processor’s unique architecture, offers the
following benefits:
ADSP-219x assembly language syntax is a superset of and
source code compatible (except for two data registers and
DAG base address registers) with ADSP-21xx family
syntax. It may be necessary to restructure ADSP-21xx
programs to accommodate the ADSP-21992’s unified
memory space and to conform to its interrupt vector map.
The algebraic syntax eliminates the need to remember
cryptic assembler mnemonics. For example, a typical
arithmetic add instruction, such as AR = AX0 + AY0,
resembles a simple equation.
Every instruction, but two, assembles into a single, 24-bit
word that can execute in a single instruction cycle. The
exceptions are two dual word instructions. One writes 16-
or 24-bit immediate data to memory, and the other is an
absolute jump/call with the 24-bit address specified in the
instruction.
Multifunction instructions allow parallel execution of an
arithmetic, MAC, or shift instruction with up to two
fetches or one write to processor memory space during a
single instruction cycle.
Program flow instructions support a wider variety of con-
ditional and unconditional jumps/calls and a larger set of
conditions on which to base execution of conditional
instructions.
DEVELOPMENT TOOLS
The ADSP-21992 is supported with a complete set of
software and hardware development tools, including Analog
Devices’ emulators and VisualDSP development environ-
ment. The same emulator hardware that supports other
ADSP-219x DSPs, also fully emulates the ADSP-21992.
The VisualDSP project management environment lets pro-
grammers develop and debug an application. This
environment includes an easy-to-use assembler that is based
on an algebraic syntax; an archiver (librarian/library
builder); a linker; a loader; a cycle-accurate, instruc-
tion-level simulator; a C/C++ compiler; and a C/C++
run-time library that includes DSP and mathematical func-
tions. Two key points for these tools are:
Compiled ADSP-219x C/C++ code efficiency—the
compiler has been developed for efficient translation of
C/C++ code to ADSP-219x assembly. The DSP has
architectural features that improve the efficiency of
compiled C/C++ code.
ADSP-218x family code compatibility—The assembler
has legacy features to ease the conversion of existing
ADSP-218x applications to the ADSP-219x.
Debugging both C/C++ and assembly programs with the
VisualDSP debugger, programmers can:
View mixed C/C++ and assembly code (interleaved
source and object information)
Insert break points
Set conditional breakpoints on registers, memory, and
stacks
Table 3. Summary of Boot Modes for ADSP-21992
Boot Mode
0
1
2
3
4
5
6
7
BMODE2
0
0
0
0
1
1
1
1
BMODE1
0
0
1
1
0
0
1
1
BMODE0
0
1
0
1
0
1
0
1
Function
Illegal – Reserved
Boot from External 8-bit Memory over EMI
Execute from External 8-bit Memory
Execute from External 16-bit Memory
Boot from SPI0
≤
4 kbits
Boot from SPI0
>
4kbits
Illegal – Reserved
Illegal – Reserved
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