參數(shù)資料
型號(hào)： ADE7878ACPZ-RL
廠商： ANALOG DEVICES INC
元件分類： 模擬信號(hào)調(diào)理
英文描述： Poly Phase Multifunction Energy Metering IC With Total And Fundamental Powers, No Of Pins: 40, Temperature Range: Ind
中文描述： SPECIALTY ANALOG CIRCUIT, QCC40
封裝： 6 X 6 MM, ROHS COMPLIANT, MO-220WJJD, LFCSP-40
文件頁(yè)數(shù)： 77/96頁(yè)
文件大?。?/td> 1096K
代理商： ADE7878ACPZ-RL
ADE7854/ADE7858/ADE7868/ADE7878
Rev. E | Page 79 of 96
Address
Register
Name
Description
0xE519
AVA
R
24
32 SE
S
N/A
Instantaneous value of Phase A
apparent power.
0xE51A
BVA
R
24
32 SE
S
N/A
Instantaneous value of Phase B
apparent power.
0xE51B
CVA
R
24
32 SE
S
N/A
Instantaneous value of Phase C
apparent power.
0xE51F
CHECKSUM
R
32
U
0x33666787
Checksum verification. See the
Checksum Register section for details.
0xE520
VNOM
R/W
24
32 ZP
S
0x000000
Nominal phase voltage rms used in the
alternative computation of the
apparent power.
0xE521 to
0xE52E
Reserved
These addresses should not be written
for proper operation.
0xE600
PHSTATUS
R
16
U
N/A
Phase peak register. See Table 41.
0xE601
ANGLE0
R
16
U
N/A
Time Delay 0. See the Time Interval
Between Phases section for details.
0xE602
ANGLE1
R
16
U
N/A
Time Delay 1. See the Time Interval
Between Phases section for details.
0xE603
ANGLE2
R
16
U
N/A
Time Delay 2. See the Time Interval
Between Phases section for details.
0xE604 to
0xE606
Reserved
These addresses should not be written
for proper operation.
0xE607
PERIOD
R
16
U
N/A
Network line period.
0xE608
PHNOLOAD
R
16
U
N/A
Phase no load register. See Table 42.
0xE609 to
0xE60B
Reserved
These addresses should not be written
for proper operation.
0xE60C
LINECYC
R/W
16
U
0xFFFF
Line cycle accumulation mode count.
0xE60D
ZXTOUT
R/W
16
U
0xFFFF
Zero-crossing timeout count.
0xE60E
COMPMODE
R/W
16
U
0x01FF
Computation-mode register. See
0xE60F
Gain
R/W
16
U
0x0000
PGA gains at ADC inputs. See Table 44.
0xE610
CFMODE
R/W
16
U
0x0E88
CFx configuration register. See Table 45.
0xE611
CF1DEN
R/W
16
U
0x0000
CF1 denominator.
0xE612
CF2DEN
R/W
16
U
0x0000
CF2 denominator.
0xE613
CF3DEN
R/W
16
U
0x0000
CF3 denominator.
0xE614
APHCAL
R/W
10
16 ZP
U
0x0000
Phase calibration of Phase A. See
0xE615
BPHCAL
R/W
10
16 ZP
U
0x0000
Phase calibration of Phase B. See Table 46.
0xE616
CPHCAL
R/W
10
16 ZP
U
0x0000
Phase calibration of Phase C. See Table 46.
0xE617
PHSIGN
R
16
U
N/A
Power sign register. See Table 47.
0xE618
CONFIG
R/W
16
U
0x0000
ADE7878 configuration register. See
0xE700
MMODE
R/W
8
U
0x1C
Measurement mode register.
0xE701
ACCMODE
R/W
8
U
0x00
Accumulation mode register.
0xE702
LCYCMODE
R/W
8
U
0x78
Line accumulation mode behavior. See
0xE703
PEAKCYC
R/W
8
U
0x00
Peak detection half line cycles.
0xE704
SAGCYC
R/W
8
U
0x00
SAG detection half line cycles.
0xE705
CFCYC
R/W
8
U
0x01
Number of CF pulses between two
consecutive energy latches. See the
CFx Outputs section.
0xE706
HSDC_CFG
R/W
8
U
0x00
HSDC configuration register. See Table 53.
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