
Data Sheet
AD5560
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
SETTLING TIME (FV, MEASURE CURRENT)
Compensation Register 1 = 0x4880 (229 nF to
380 nF, ESR 74 to 140 mΩ)
To within 10 mV of programmed value.
MI (1200 mA EXTFORCE1 Rang
e)130
40
s
3.7 V step, RDUT = 2.4 Ω, CDUT = 0.22 F, full dc load.
MI (900 mA EXTFORCE1 Rang
e)132
42
s
8 V step, RDUT = 8.8 Ω, CDUT = 0.22 F, full dc load.
MI (500 mA EXTFORCE2 Rang
e)169
95
s
15 V step, RDUT = 30 Ω, CDUT = 0.22 F, full dc
load.
70
100
s
10 V step, RDUT = 33.3 Ω, CDUT = 0.22 F, full dc load.
650
s
20 V step, RDUT = 800 Ω, CDUT = 0.22 F, full dc load.
6400
s
10 V step, RDUT = 4 kΩ, CDUT = 0.22 F, full dc
load.
10
15
s
0.5 V step using MEASOUT high-Z to within
10 mV of final value.
SETTLING TIME (FV, MEASURE VOLTAGE)
Compensation Register 1 = 0x4880 (229 nF to
380 nF, ESR 74 to 140 mΩ)
To within 10 mV of programmed value.
16
s
3.7 V step, RDUT = 2.4 Ω, CDUT = 0.22 F, full dc load.
20
s
8 V step, RDUT = 8.8 Ω, CDUT = 0.22 F, full dc load.
34
s
15 V step, RDUT = 30 Ω, CDUT = 0.22 F, full dc
load.
25
s
10 V step, RDUT = 33.3 Ω, CDUT = 0.22 F, full dc load.
125
180
s
20 V step, RDUT = 800 Ω, CDUT = 0.22 F, full dc load.
300
500
s
10 V step, RDUT = 4 kΩ, CDUT = 0.22 F, full dc
load.
300
500
s
10 V step, RDUT = 40 kΩ, CDUT = 0.22 F, full dc load.
2
5
s
10 V step using MEASOUT high-Z to within
10 mV of final value.
SETTLING TIME (FV) SAFE MODE
To within 100 mV of programmed value.
FV (1200 mA EXTFORCE1 Ran
ge125
s
3.7 V step, RDUT = 3.1 Ω, CDUT = 0.22 F, full dc load.
FV (180 mA EXTFORCE1 Rang
e)1303
s
3 V step, RDUT = 16 Ω, CDUT = 0. 22 F to 20 μF, full
dc load.
FV (100 mA EXTFORCE2 Rang
e)1660
s
8 V step, RDUT = 33.3 Ω, CDUT = 0. 22 F to 20 μF,
full dc load.
760
1000
s
20 V step, RDUT = 400 Ω, CDUT = 0.22 F, full dc load.
SWITCHING TRANSIENTS
0.5
% of FV
CDUT = 10 μF, changing from higher to adjacent
lower ranges (except EXTFORCE1 to EXTFORCE2).
20
mV
CDUT = 10 μF, changing from lower (5 A) to
higher range (EXTFORCE1).
0.5
% of FV
CDUT = 100 μF, changing between all ranges.
DAC SPECIFICATIONS
Force/Comparator/Offset DACs
Resolution
16
Bits
Voltage Output Span
22
+25
V
VREF = 5 V, minimum and maximum values set
by offset DAC.
Differential Nonlineari
ty11
+1
LSB
Guaranteed monotonic.
Offset DAC
Gain Error
20
+20
mV
Clamp DAC
CLL < CLH.
Resolution
16
Bits
Voltage Output Span
22
+25
V
VREF = 5 V, minimum and maximum values set
by offset DAC.
Differential Nonlineari
ty11
+1
LSB
Guaranteed monotonic.
OSD DAC
Resolution
16
Bits
Voltage Output Span
0.62
5
V
VREF = 5 V.
Differential Nonlineari
ty12
+2
LSB
DGS DAC
Resolution
16
Bits
Voltage Output Span
0
5
V
VREF = 5 V.
Differential Nonlineari
ty12
+2
LSB