參數(shù)資料
型號： AD5560JSVUZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 14/68頁
文件大?。?/td> 0K
描述： IC DPS PROGRAMABLE W/DAC 64TQFP
設計資源： Integrated Device Power Supply for PAD with Output Voltage Range 0 V to 25 V (CN0130)
標準包裝： 1,500
類型： 電源
應用： 自動測試設備
安裝類型： 表面貼裝
封裝/外殼： 64-TQFP 裸露焊盤
供應商設備封裝： 64-TQFP-EP（10x10）
包裝： 帶卷 (TR)
Data Sheet
AD5560
Rev. D | Page 21 of 68
07779-
037
CODE
0
10,000
20,000
30,000
40,000
50,000
60,000
70,000
HIGH SUPPLIES
NOMINAL SUPPLIES
HIGH: AVDD = 28V, AVSS = –5V, OFFSET DAC = 0xD1D
LOW: AVDD = 5V, AVSS = –25V OFFSET DAC = 0xD4EB
NOM: AVDD/AVSS = ±16.25V, OFFSET DAC = 0x8000
VREF = 5V
±25mA RANGE
LOW SUPPLIES
L
INE
ARI
T
Y
(
%)
–0.0500
0.0500
–0.0375
–0.0250
–0.0125
0.0125
0
0.0250
0.0375
Figure 14. Measure Current Linearity vs. Code (MEASOUT Gain = 0.2,
MI Gain = 20)
07779-
038
CODE
0
10,000
20,000
30,000
40,000
50,000
60,000
70,000
HIGH SUPPLIES
HIGH: AVDD = 28V, AVSS = –5V, OFFSET DAC = 0xD1D
LOW : AVDD = 5V, AVSS = –25V OFFSET DAC = 0xD4EB
NOM : AVDD/AVSS = ±16.25V, OFFSET DAC = 0x8000
VREF = 5V ±25mA RANGE
LOW SUPPLIES
NOMINAL SUPPLIES
L
INE
ARI
T
Y
(
%)
–0.100
0.100
–0.075
–0.050
–0.025
0.025
0
0.050
0.075
Figure 15. Measure Current Linearity vs. Code (MEASOUT Gain = 0.2,
MI Gain = 10)
07779-
039
CODE
L
INE
ARI
T
Y
(
%)
0
10,000
20,000
30,000
40,000
50,000
60,000
–0.0100
0.0100
–0.0075
–0.0050
–0.0025
0.0025
0
0.0050
0.0075
AVDD = +16.25V
AVSS = –16.25V
VREF = 5V
OFFSET DAC = 0x8000
MI GAIN = 20
MEASOUT GAIN = 1
25mA RANGE
25A RANGE
2.5mA
Figure 16. Measure Current Linearity vs. IRANGE (MEASOUT Gain = 1,
MI Gain = 20)
07779-
040
CODE
L
INE
ARI
T
Y
(
%)
0
10,000
20,000
30,000
40,000
50,000
60,000
–0.0500
0.0500
–0.0375
–0.0250
–0.0125
0.0125
0
0.0250
0.0375
AVDD = +16.25V
AVSS = –16.25V
VREF = 5V
OFFSET DAC = 0x8000
MI GAIN = 20
MEASOUT GAIN = 0.2
25mA RANGE
25A RANGE
2.5mA
Figure 17. Measure Current Linearity vs. IRANGE (MEASOUT Gain = 0.2,
MI Gain = 20)
07779-
030
STRESS VOLTAGE (V)
L
E
AKAG
E
CURRE
NT
(
n
A)
TJ = 25°C
–3.0
–2.5
–2.0
–1.5
–1.0
–0.5
0
0.5
1.0
1.5
–10
5
0
5
10
EXTFORCE1A
EXTFORCE2B
FORCE
EXTFORCE1B
EXTMEASIH1
SENSE
EXTFORCE1C
EXTMEASIH2
SYS_FORCE
EXTFORCE2A
EXTMEASIL
SYS_SENSE
COMBINED LEAKAGE
Figure 18. Leakage Current vs. Stress Voltage (Force and Combined Leakage)
0
1
2
3
4
5
6
7
07779-
031
L
E
AKAG
E
CURRE
NT
(
n
A)
EXTFORCE1A
EXTFORCE2B
FORCE
EXTFORCE1B
EXTMEASIH1
SENSE
EXTFORCE1C
EXTMEASIH2
SYS_FORCE
EXTFORCE2A
EXTMEASIL
SYS_SENSE
COMBINED LEAKAGE
VSTRESS = 9V
25
35
45
55
65
75
85
95
TEMPERATURE (°C)
Figure 19. Leakage Current vs. Temperature (Force and Combined Leakage),
VSTRESS = 9 V
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