AC Characteristics 16- and 20MHz
All timing parameters are specified under capactive load of 50pf, Vcc 4.75V to 5.25V,
and temperature of 0 to 70
°
C, and allow operation at 16MHz with 100ns DRAM or
20MHz with 80ns DRAM without a CAS-extended wait state. All the units discussed
are in nanoseconds and are subject to change.
Unless otherwise noted, the following configuration options are also supported:
Memory configurations up to 8 banks using Encoded RAS (SRA mode)
Memory configurations up to 4 banks using either SRA or MRA mode, nonencoded
RAS
Cache or non-cache
Nonlatching buffer between SA-bus and CPU local address bus
Formula Specifications refer to the minimum or maximum result of a specified
calculation involving other chip parameters. For any particular chip, formula
specifications express a tracking relationship over temperature and voltage for the
parameters involved in the formula.
Note that timing parameters are grouped into subsections according to the most common
modes and cycle types to which they apply, but parameters are not necessarily limited
only to those cases. Unless otherwise noted, all min/max timing limits are valid for all
modes and cycle types in which the referenced signals follow the stated functional
relationship.
The following terminology is used in the parameter descriptions:
Command
Rise
Fall
Float
Turn-on
Active
Inactive
=
=
=
=
=
=
=
-XIOR, -XIOW, -XMEMR or -XMEMW
low-to-high transition
high-to-low transition
transition to high-impedance state
a signal coming out of ‘‘float’’ and driven high or low
high for high-true signals, or low for low-true
high for low-true signals, or low for high-true
To assure reliable local memory operation under worst-case conditions, the DRAMs
should meet the specifications shown in the following table. Most DRAMs utilizing
CMOS technology can readily meet these specifications.
System Characteristics
AC Characteristics 16- and 20MHz
I
Chips and Technologies, Inc.
P R E L I M I N A R Y
Revision 3.0
12-3