參數(shù)資料
型號(hào): 7544
英文描述: 3.3V LDO POSITVE VOLTAGE REGULATOR 2% TOL.
中文描述: 7544Group數(shù)據(jù)表數(shù)據(jù)表503K/JUN.25.03
文件頁(yè)數(shù): 19/54頁(yè)
文件大小: 503K
代理商: 7544
Rev.1.02 2003.06.25 page 19 of 53
7544 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Key Input Interrupt (Key-On Wake-Up)
A key-on wake-up interrupt request is generated by applying
L
level to any pin of port P0 that has been set to input mode.
In other words, it is generated when the AND of input level goes
from
1
to
0
. An example of using a key input interrupt is shown
in Figure 19, where an interrupt request is generated by pressing
one of the keys provided as an active-low key matrix which uses
ports P0
0
to P0
3
as input ports.
Fig. 19 Connection example when using key input interrupt and port P0 block diagram
Port PXx
L
level output
PULL register
bit 3 =
0
Port P0
7
latch
Port P0
7
Direction register =
1
**
*
P0
7
output
Key input interrupt request
Port P0
Input read circuit
* P-channel transistor for pull-up
** CMOS output buffer
PULL register
bit 3 =
0
Port P0
6
latch
Port P0
6
Direction register =
1
**
*
P0
6
output
PULL register
bit 3 =
0
Port P0
5
latch
Port P0
5
Direction register =
1
**
*
P0
5
output
PULL register
bit 3 =
0
Port P0
4
latch
Port P0
4
Direction register =
1
**
*
P0
4
output
PULL register
bit 2 =
1
Port P0
3
latch
Port P0
3
Direction register =
0
**
*
P0
3
input
PULL register
bit 2 =
1
Port P0
2
latch
Port P0
2
Direction register =
0
**
*
P0
2
input
PULL register
bit 1 =
1
Port P0
1
latch
Port P0
1
Direction register =
0
**
*
P0
1
input
PULL register
bit 0 =
1
Port P0
0
latch
Port P0
0
Direction register =
0
**
*
P0
0
input
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Port P0
0
key-on wakeup
selection bit
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