
MSCAN08 Controller (MSCAN08)
Programmer’s Model of Control Registers
MC68HC08AZ32A — Rev 1.0
Technical Data
MOTOROLA
MSCAN08 Controller (MSCAN08)
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371
AC7–AC0 — Acceptance Code Bits
AC7–AC0 comprise a user-defined sequence of bits with which the
corresponding bits of the related identifier register (IDRn) of the
receive message buffer are compared. The result of this comparison
is then masked with the corresponding identifier mask register.
NOTE:
The CIDAR0–3 registers can be written only if the SFTRES bit in
CMCR0 is set
20.14.13 MSCAN08 Identifier Mask Registers (CIDMR0-3)
The identifier mask registers specify which of the corresponding bits in
the identifier acceptance register are relevant for acceptance filtering.
For standard identifiers it is required to program the last three bits (AM2-
AM0) in the mask register CIDMR1 to ‘don’t care’.
CIDMRO
Address: $0514
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
Reset:
CIDMR1
AM7
AM6
AM5
AM4
AM3
AM2
AM1
AM0
Unaffected by Reset
Address: $0515
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
Reset:
CIDMR2
AM7
AM6
AM5
AM4
AM3
AM2
AM1
AM0
Unaffected by Reset
Address: $0516
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
Reset:
CIDMR3
AM7
AM6
AM5
AM4
AM3
AM2
AM1
AM0
Unaffected by Reset
Address: $0517
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Write:
Reset:
AM7
AM6
AM5
AM4
AM3
AM2
AM1
AM0
Unaffected by Reset
Figure 20-27. Identifier Mask Registers (CIDMR0–CIDMR3)
F
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n
.