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參數資料
| 型號： | ZL50119GAG |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 通信及網絡 |
| 英文描述： | 32, 64 and 128 Channel CESoP Processors |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA324 |
| 封裝： | 23 X 23 MM, 2.03 MM HEIGHT, 1 MM PITCH, PLASTIC, MS-034, BGA-324 |
| 文件頁數： | 92/95頁 |
| 文件大?。?/td> | 1157K |
| 代理商： | ZL50119GAG |
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ZL50115/16/17/18/19/20
Data Sheet
92
Zarlink Semiconductor Inc.
16.0 Glossary
API
Application Program Interface
ATM
Asynchronous Transfer Mode
CDP
Context Descriptor Protocol (the protocol used by Zarlink’s MT9088x family of TDM-Packet devices)
CESoP
Circuit Emulation Services over Packet
CESoPSN
Circuit Emulation Services over Packet Switched Networks
CONTEXT
A programmed connection of a number of TDM timeslots assembled into a unique packet stream.
CPU
Central Processing Unit
DMA
Direct Memory Access
DPLL
Digital Phase Locked Loop
DSP
Digital Signal Processor
GMII
Gigabit Media Independent Interface
H.100/H.110
High capacity TDM backplane standards
H-MVIP
High-performance Multi-Vendor Integration Protocol (a TDM bus standard)
IETF
Internet Engineering Task Force
IA
Implementation Agreement
IP
Internet Protocol (version 4, RFC 791, version 6, RFC 2460)
JTAG
Joint Test Algorithms Group (generally used to refer to a standard way of providing a board-level test
facility)
L2TP
Layer 2 Tunneling Protocol (RFC 2661)
LAN
Local Area Network
LIU
Line Interface Unit
MAC
Media Access Control
MEF
Metro Ethernet Forum
MFA
MPLS and Frame Relay Alliance
MII
Media Independent Interface
MIB
Management Information Base
MPLS
Multi Protocol Label Switching
MTIE
Maximum Time Interval Error
MVIP
Multi-Vendor Integration Protocol (a TDM bus standard)
PDH
Plesiochronous Digital Hierarchy
PLL
Phase Locked Loop
PRS
Primary Reference Source
PRX
Packet Receive
PSTN
Public Switched Telephone Circuit
相關PDF資料 |
PDF描述 |
|---|---|
| ZL50120GAG | 32, 64 and 128 Channel CESoP Processors |
| ZL50118GAG | Connector assemblies, Network cables; |
| ZL50117GAG | REFLECTIVE PHOTOSENSOR SMD RSS42 |
| ZL50115 | 32, 64 and 128 Channel CESoP Processors |
| ZL50116 | 32, 64 and 128 Channel CESoP Processors |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ZL50119GAG2 | 制造商:Microsemi Corporation 功能描述:64 CHANNEL CESOP PROCESSOR 制造商:Microsemi Corporation 功能描述:CESOP PROCESSOR 324BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 64CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 64CH 324PBGA |
| ZL50120 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:32, 64 and 128 Channel CESoP Processors |
| ZL50120GAG | 制造商:Microsemi Corporation 功能描述:CH CESOP PROCESSORS 324BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 128CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 128CH 324PBGA |
| ZL50120GAG2 | 制造商:Microsemi Corporation 功能描述:CESOP PROCESSOR 324BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 128CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 128CH 324PBGA |
| ZL50130 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Ethernet Pseudo-Wires across a PSN |
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