參數(shù)資料
型號(hào)： ZL50119GAG
廠商： ZARLINK SEMICONDUCTOR INC
元件分類(lèi)： 通信及網(wǎng)絡(luò)
英文描述： 32, 64 and 128 Channel CESoP Processors
中文描述： SPECIALTY TELECOM CIRCUIT, PBGA324
封裝： 23 X 23 MM, 2.03 MM HEIGHT, 1 MM PITCH, PLASTIC, MS-034, BGA-324
文件頁(yè)數(shù)： 55/95頁(yè)
文件大?。?/td> 1157K
代理商： ZL50119GAG
ZL50115/16/17/18/19/20
Data Sheet
55
Zarlink Semiconductor Inc.
7.0 Clock Recovery
One of the main issues with circuit emulation is that the clock used to drive the TDM link is not necessarily linked
into the central office reference clock, and hence may be any value within the tolerance defined for that service.
The reverse link may also be independently timed, and operating at a slightly different frequency. In the
plesiochronous digital hierarchy the difference in clock frequencies between TDM links is compensated for using bit
stuffing techniques, allowing the clock to be accurately regenerated at the remote end of the carrier network.
With a packet network, that connection between the ingress and egress frequency is broken, since packets are
discontinuous in time. From Figure 8, the TDM service frequency
f
service
at the customer premises must be exactly
reproduced at the egress of the packet network. The consequence of a long-term mismatch in frequency is that the
queue at the egress of the packet network will either fill up or empty, depending on whether the regenerated clock is
slower or faster than the original. This will cause loss of data and degradation of the service.
The ZL5011x provides a per-stream clock recovery function to reproduce the TDM service frequency at the egress
of the packet network. There are two schemes are employed, depending on the availability of a common reference
clock at each provider edge unit, within the ZL5011x - differential and adaptive. The clock recovery itself is
performed by software in the external processor, with support from on-chip hardware to gather the required
statistics.
7.1 Differential Clock Recovery
For applications where the wander characteristics of the recovered clock are very important, such as when the
emulated circuit must be connected into the plesiochronous digital hierarchy (PDH), the ZL5011x also offers a
differential clock recovery technique. This relies on having a common reference clock available at each provider
edge point. Figure 20 illustrates this concept with a common Primary Reference Source (PRS) clock being present
at both the source and destination equipment.
In a differential technique, the timing of the TDM service clock is sent relative to the common reference clock. Since
the same reference is available at the packet egress point and the packet size is fixed, the original service clock
frequency can be recovered. This technique is unaffected by any low frequency components in the packet delay
variation. The disadvantage is the requirement for a common reference clock at each end of the packet network,
which could either be the central office TDM clock, or provided by a global position system (GPS) receiver.
Figure 20 - Differential Clock Recovery
LIU
LIU
ZL5011x
source
node
ZL5011x
destination
node
Timestamp
generation
Timestamp
extraction
Host CPU
Timing
recovery
DCO
Data
Source
Clock
Data
Dest'n
Clock
Packets
Packets
PRS
clock
Network
相關(guān)PDF資料
PDF描述
ZL50120GAG 32, 64 and 128 Channel CESoP Processors
ZL50118GAG Connector assemblies, Network cables;
ZL50117GAG REFLECTIVE PHOTOSENSOR SMD RSS42
ZL50115 32, 64 and 128 Channel CESoP Processors
ZL50116 32, 64 and 128 Channel CESoP Processors
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZL50119GAG2 制造商:Microsemi Corporation 功能描述:64 CHANNEL CESOP PROCESSOR 制造商:Microsemi Corporation 功能描述:CESOP PROCESSOR 324BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 64CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 64CH 324PBGA
ZL50120 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:32, 64 and 128 Channel CESoP Processors
ZL50120GAG 制造商:Microsemi Corporation 功能描述:CH CESOP PROCESSORS 324BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 128CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 128CH 324PBGA
ZL50120GAG2 制造商:Microsemi Corporation 功能描述:CESOP PROCESSOR 324BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 128CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 128CH 324PBGA
ZL50130 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Ethernet Pseudo-Wires across a PSN
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*