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參數(shù)資料
| 型號： | ZL50119GAG |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | 32, 64 and 128 Channel CESoP Processors |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA324 |
| 封裝： | 23 X 23 MM, 2.03 MM HEIGHT, 1 MM PITCH, PLASTIC, MS-034, BGA-324 |
| 文件頁數(shù)： | 49/95頁 |
| 文件大?。?/td> | 1157K |
| 代理商： | ZL50119GAG |
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ZL50115/16/17/18/19/20
Data Sheet
49
Zarlink Semiconductor Inc.
Each of the 11 data flows uses the Task Manager to route packet information to the next block or interface for
onward transmission. The flow is determined by the Type field in the Task Message (see ZL50115/16/17/18/19/20
Programmers Model).
6.3 TDM Interface
The ZL5011x family offers the following types of TDM service across the packet network:
Unstructured services are fully asynchronous, and include full support for clock recovery on a per stream basis.
Both adaptive and differential clock recovery mechanisms can be used.
Structured services are synchronous, with all streams driven by a common clock and frame reference. These
services can be offered in two ways:
Synchronous master mode
- the ZL5011x provides a common clock and frame pulse to all streams, which
may be locked to an incoming clock or frame reference
Synchronous slave mode
- the ZL5011x accepts a common external clock and frame pulse to be used by
all streams
In either structured mode, N x 64 Kbps trunking is supported as detailed in “Payload Order” on page 53.
6.3.1 TDM Interface Block
The TDM Interface contains two basic types of interface: unstructured clock and data, for interfacing directly to a
line interface unit; or structured, framed data, for interfacing to a framer or TDM backplane.
Unstructured data is treated asynchronously, with every stream using its own clock. Clock recovery is provided on
each output stream, to reproduce the TDM service frequency at the egress of the packet network. Structured data is
treated synchronously, i.e. all data streams are timed by the same clock and frame references. These can either be
supplied from an external source (slave mode) or generated internally using the on-chip stratum 3/4/4E PLL
(master mode).
Service type
TDM interface
Interface type
Interfaces to
Unstructured
asynchronous
T1, E1, J2, E3, T3 and
STS-1
Bit clock in and out
Data in and out
Line interface unit
Structured synchronous
(N x 64 Kbps)
T1, E1 and J2
Framed TDM data
streams at 2.048 and
8.192 Mbps
Bit clock out
Frame pulse out
Data in and out
Framers
TDM backplane (master)
Bit clock in
Frame in
Data in and out
Framers
TDM backplane (slave)
Table 20 - TDM Services Offered by the ZL50115/16/17/18/19/20 Family
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ZL50120GAG | 32, 64 and 128 Channel CESoP Processors |
| ZL50118GAG | Connector assemblies, Network cables; |
| ZL50117GAG | REFLECTIVE PHOTOSENSOR SMD RSS42 |
| ZL50115 | 32, 64 and 128 Channel CESoP Processors |
| ZL50116 | 32, 64 and 128 Channel CESoP Processors |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZL50119GAG2 | 制造商:Microsemi Corporation 功能描述:64 CHANNEL CESOP PROCESSOR 制造商:Microsemi Corporation 功能描述:CESOP PROCESSOR 324BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 64CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 64CH 324PBGA |
| ZL50120 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:32, 64 and 128 Channel CESoP Processors |
| ZL50120GAG | 制造商:Microsemi Corporation 功能描述:CH CESOP PROCESSORS 324BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 128CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 128CH 324PBGA |
| ZL50120GAG2 | 制造商:Microsemi Corporation 功能描述:CESOP PROCESSOR 324BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 128CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 128CH 324PBGA |
| ZL50130 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Ethernet Pseudo-Wires across a PSN |
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