參數資料
型號: ZL50119GAG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 通信及網絡
英文描述: 32, 64 and 128 Channel CESoP Processors
中文描述: SPECIALTY TELECOM CIRCUIT, PBGA324
封裝: 23 X 23 MM, 2.03 MM HEIGHT, 1 MM PITCH, PLASTIC, MS-034, BGA-324
文件頁數: 88/95頁
文件大小: 1157K
代理商: ZL50119GAG
ZL50115/16/17/18/19/20
Data Sheet
88
Zarlink Semiconductor Inc.
14.0 Design and Layout Guidelines
This guide will provide information and guidance for PCB layouts when using the ZL5011x. Specific areas of
guidance are:
High Speed Clock and Data, Outputs and Inputs
CPU_TA Output
14.1 High Speed Clock & Data Interfaces
On the ZL5011x series of devices there are four high-speed data interfaces that need consideration when laying out
a PCB to ensure correct termination of traces and the reduction of crosstalk noise. The interfaces being:
GMAC Interfaces
TDM Interface
CPU Interface
It is recommended that the outputs are suitably terminated using a series termination through a resistor as close to
the output pin as possible. The purpose of the series termination resistor is to reduce reflections on the line. The
value of the series termination and the length of trace the output can drive will depend on the driver output
impedance, the characteristic impedance of the PCB trace (recommend 50 ohm), the distributed trace capacitance
and the load capacitance. As a general rule of thumb, if the trace length is less than 1/6th of the equivalent length of
the rise and fall times, then a series termination may not be required.
the equivalent length of rise time = rise time (ps) / delay (ps/mm)
For example:
Typical FR4 board delay = 6.8 ps/mm
Typical rise/fall time for a ZL5011x output = 2.5 ns
critical track length = (1/6) x (2500/6.8) = 61 mm
Therefore tracks longer than 61 mm will require termination.
As a signal travels along a trace it creates a magnetic field, which induces noise voltages in adjacent traces, this is
crosstalk. If the crosstalk is of sufficiently strong amplitude, false data can be induced in the trace and therefore it
should be minimized in the layout. The voltage that the external fields cause is proportional to the strength of the
field and the length of the trace exposed to the field. Therefore to minimize the effect of crosstalk some basic
guidelines should be followed.
First, increase separation of sensitive signals, a rough rule of thumb is that doubling the separation reduces the
coupling by a factor of four. Alternatively, shield the victim traces from the aggressor by either routing on another
layer separated by a power plane (in a correctly decoupled design the power planes have the same AC potential) or
by placing guard traces between the signals usually held ground potential.
Particular effort should be made to minimize crosstalk from ZL5011x outputs and ensuring fast rise time to these
inputs.
相關PDF資料
PDF描述
ZL50120GAG 32, 64 and 128 Channel CESoP Processors
ZL50118GAG Connector assemblies, Network cables;
ZL50117GAG REFLECTIVE PHOTOSENSOR SMD RSS42
ZL50115 32, 64 and 128 Channel CESoP Processors
ZL50116 32, 64 and 128 Channel CESoP Processors
相關代理商/技術參數
參數描述
ZL50119GAG2 制造商:Microsemi Corporation 功能描述:64 CHANNEL CESOP PROCESSOR 制造商:Microsemi Corporation 功能描述:CESOP PROCESSOR 324BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 64CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 64CH 324PBGA
ZL50120 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:32, 64 and 128 Channel CESoP Processors
ZL50120GAG 制造商:Microsemi Corporation 功能描述:CH CESOP PROCESSORS 324BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 128CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 128CH 324PBGA
ZL50120GAG2 制造商:Microsemi Corporation 功能描述:CESOP PROCESSOR 324BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 128CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 128CH 324PBGA
ZL50130 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Ethernet Pseudo-Wires across a PSN