- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄361744 > VRC4372-1 I/O CONTROLLER PDF資料下載
參數(shù)資料
| 型號(hào)： | VRC4372-1 |
| 英文描述： | I/O CONTROLLER |
| 中文描述： | I / O控制器 |
| 文件頁(yè)數(shù)： | 21/66頁(yè) |
| 文件大?。?/td> | 721K |
| 代理商： | VRC4372-1 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)當(dāng)前第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)
21
V
RC
4372 I/O Controller
Interrupt Status Registers (INTSTAT[2:0])
Each of these registers corresponds to the output interrupt pin IPL[2:0] of the same
number. These three registers provide a snapshot of the source of an IPL interrupt
taken on one clock edge during the read cycle (synchronized). This register also
provides a means for clearing edge-triggered interrupt sources. To clear an edge-
triggered interrupt, a zero is written to this register in the bit position of the interrupt.
And, since common edge-detection logic is used for an interrupt source to both IPL
outputs, clearing a bit in one INTSTAT register clears the bit in all registers. Zeros
written to level-triggered interrupt sources have no effect. Every possible interrupt
source has a corresponding bit in each of these registers. When this bit is set, the
interrupt source is driving the IPL pin. When this bit is clear, the interrupt source is not
the cause of the IPL output assertion. Note that because level-triggered sources are
not clocked, it is possible (but unlikely) that an interrupt could be generated and
disappear before this register is read.
Bit(s)
Symbol
Description
13:0
INT[13:0]
Each bit corresponds to an external qualified interrupt input line
of the same number.
17:14
DMA_INT[3:0]
Interrupt status bit for DMA channels 3 to 0
19:18
TICK[1:0]
Interrupt status bit for timer TICK1 and TICK0
21:20
Unused
Undefined
22
TOUT_INT
Interrupt status bit for an I/O bus timeout interrupt
23
PERR_INT
Interrupt status bit for the PCI PERR_INT signal
24
SERR_INT
Interrupt status bit for the PCI SERR_INT signal
25
SIG_TA
Interrupt status bit for the PCI SIG_TA signal
26
REC_TA
Interrupt status bit for the PCI REC_TA signal
27
SIG_MA
Interrupt status bit for the PCI SIG_MA signal
28
PCI_ADD
Interrupt status bit for the PCI PCI_ADD signal
29
RET_ERR
Interrupt status bit for the PCI RET_ERR signal
30
Unused
Read back as zero
31
Unused
Read back as zero
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VRC4373 | SYSTEM CONTROLLER |
| VRE104C | Voltage Reference |
| VRE104CA | Voltage Reference |
| VRE104M | Voltage Reference |
| VRE104MA | Voltage Reference |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VRC5074-V3.0-A | 制造商:Renesas Electronics Corporation 功能描述: |
| VRCABLERJ11 | 制造商:Promise Technologies 功能描述:200CM 6PIN DB9/RJ11 BLACK-CABLE - Bulk |
| VRCD5351 | 制造商:GENIE CCTV 功能描述:CAMERA DOME 530TVL VANDAL RESIST |
| VRCU2600I | 制造商:Promise Technologies 功能描述:VESS RAID 2K ISCSI CONTROLLER WITH 2GB CACHE MEMORY - Bulk |
| VRCU2U12I | 制造商:Promise Technologies 功能描述:2U/12-BAY ISCSI CONTROLLER WITH 512MB DDR2 MEMORY - Bulk |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。