
16
V
RC
4372 I/O Controller
6.2.4
General-Purpose Direction Register (GPDIR)
This register selects the GPIO pins to perform as either inputs or outputs.
6.2.5
General-Purpose Output Register (GPOUT)
This register contains the data to be placed on GPIO pins configured as outputs. Data
written to input pins is ignored.
6.2.6
General-Purpose Input Register (GPIN)
This register provides the capability to read the state of the GPIO pins at the pad. All
pins, whether configured as input or output, can be read.
6.3
Interrupt Controller
6.3.1
Overview
The interrupt controller block controls the 14 external interrupt pins and internal
interrupt sources (two timer ticks, four DMA channel interrupts, one watchdog timer,
and a host of PCI error sources) coded onto three output interrupt pins. This interrupt
controller implements a very simple scheme that does not perform interrupt encoding.
Each of the 14 external interrupt lines (INT[13:0]) can be programmed separately to
falling edge, rising edge, active low, or active high; triggering occurs via the INTPOL
and INTTRIG registers. Additionally, each of the 14 raw interrupt lines may be read
using the INTPINS register.
Each of the three IPL[2:0] interrupt output pins has an associated Interrupt Source
Mask register (INTMSK[2:0]) and Interrupt Status register (INTSTAT[2:0]).
Bit(s)
Symbol
Description
10:0
GPDIR[10:0]
Each bit controls the direction of the GPIO pin of the same number.
At power-up, all bits are reset to 0 (input). When a bit is set to 1, the
appropriate GPIO pin is output.
31:11
Unused
Read back as zero
Bit(s)
Symbol
Description
10:0
GPOUT[10:0]
Each bit sends data onto the GPIO pin of the same number.
31:11
Unused
Read back as zero
Bit(s)
Symbol
Description
10:0
GPIN[10:0]
Each bit reads data back from the GPIO pin of the same number.
31:11
Unused
Read back as zero