參數(shù)資料
型號： VCT3801A
廠商： MICRONAS SEMICONDUCTOR HOLDING AG
英文描述： Video/Controller/Teletext IC Family
中文描述： 視頻/控制/圖文電視IC系列
文件頁數(shù)： 142/172頁
文件大?。?/td> 2243K
代理商： VCT3801A
VCT 38xxA
ADVANCE INFORMATION
142
Micronas
6.3. Pin Descriptions for PSDIP64 package
Pin 1,2,5-10,
P10
P17
I/O Port (Fig. 6–28)
These pins provide CPU controlled I/O ports.
Pin 3,
VSUPP1*
Supply Voltage, Port 1 Driver
This pin is used as supply for the I/O port 1 driver.
Pin 4,
GNDP1
*
Ground, Port 1 Driver
This is the ground reference for the I/O port 1 driver.
Pin 11,
VOUT
Analog Video Output (Fig. 6–13)
The analog video signal that is selected for the main
(luma, CVBS) adc is output at this pin. An emitter fol-
lower is required at this pin.
Pin 12,
VRT
Reference Voltage Top (Fig. 6–14)
Via this pin, the reference voltage for the A/D converters
is decoupled. The pin is connected with 10
μ
F/47 nF to
the Signal Ground Pin.
Pin 13,
SGND
Signal GND for Analog Input
This is the high quality ground reference for the video
input signals.
Pin 14,
GNDAF*
Ground, Analog Front-end
This pin has to be connected to the analog ground. No
supply current for the digital stages should flow
through this line.
Pin 15,
VSUPAF*
Supply Voltage, Analog Front-end
This pin has to be connected to the analog supply volt-
age. No supply current for the digital stages should
flow through this line.
Pin 16,18,
CBIN,CRIN
Analog Chroma Component
Input (Fig. 6–11)
These pins are used as the chroma component (CB,
CR) inputs required for the analog YUV Interface. The
input signal must be AC-coupled. The CRIN pin can
alternatively be used as the second SVHS chroma
input (CIN2).
Pin 17,18,
CIN1,CIN2
Analog Chroma Input (Fig. 6–
11)
These are the analog chroma inputs. A S-VHS chroma
signal is converted using the chroma (Video 2) AD
converter. A resistive divider is used to bias the input
signal to the middle of the converter input range. The
input signal must be AC-coupled. The CIN2 pin can
alternatively be used as the chroma component (CR)
input required for the analog YUV Interface.
Pins 19
22,
VIN1–4
Analog Video Input (Fig. 6–10)
These are the analog video inputs. A CVBS or S-VHS
luma signal is converted using the luma (Video 1) AD
converter. The input signal must be AC-coupled.
Pin 23,
TEST
Test Input (Fig. 6–6)
This pin enables factory test modes. For normal opera-
tion, it must be connected to ground.
Pin 24,
HOUT
Horizontal Drive Output (Fig. 6–17)
This open drain output supplies the drive pulse for the
horizontal output stage. The polarity and gating with
the flyback pulse are selectable by software.
Pin 25,
VSUPD*
Supply Voltage, Digital Circuitry
Pin 26,
GNDD*
Ground, Digital Circuitry
This is the ground reference for the digital circuitry.
Pin 27,
FBLIN
Fast Blank Input
(Fig. 6–19)
These pins are used to switch the RGB outputs to the
external analog RGB inputs. The active level (low or
high) can be selected by software.
Pin 28,29,30,
RIN, GIN, BIN
Analog RGB Input (Fig.
6–15)
These pins are used to insert an external analog RGB
signal, e.g. from a SCART connector which can by
switched to the analog RGB outputs with the fast blank
signal. The analog back-end provides separate bright-
ness and contrast settings for the external analog RGB
signals.
Pin 31,
VPROT
Vertical Protection Input (Fig. 6–18)
The vertical protection circuitry prevents the picture
tube from burn-in in the event of a malfunction of the
vertical deflection stage. During vertical blanking, a
signal level of 2.5V is sensed. If a negative edge can-
not be detected, the RGB output signals are blanked.
Pin 32,
SAFETY
Safety Input (Fig. 6–18)
This is a three-level input. Low level means normal
function. At the medium level RGB output signals are
blanked. At high level RGB output signals are blanked
and horizontal drive is shut off.
Pin 33,
HFLB
Horizontal Flyback Input (Fig. 6–18)
Via this pin the horizontal flyback pulse is supplied to
the VCT 38xxA.
Pin 34,
VERTQ, INTLC
Inverted Vertical Sawtooth
Output (Fig. 6–21) / Interlace Output
(Fig. 6–20)
This pin supplies the inverted signal of VERT. Together
with the VERT pin it can be used to drive symmetrical
deflection amplifiers. The drive signal is generated with
15-bit precision. The analog voltage is generated by a
4 bit current-DAC with external resistor and uses digital
noise shaping. Alternatively this pin supplies the inter-
lace information, the polarity is programmable.
Pin 35,
VERT
Vertical Sawtooth Output
(Fig. 6–21)
This pin supplies the drive signal for the vertical output
stage. The drive signal is generated with 15-bit preci-
sion. The analog voltage is generated by a 4 bit cur-
rent-DAC with external resistor and uses digital noise
shaping.
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