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| 型號(hào)： | V62C5181024LL-70P |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | ECONOLINE: RY & RX - Controllable Output- 1kVDC Isolation- No Heatsink Required- UL94V-0 Package Material- Toroidal Magnetics- No External Components- Fully Encapsulated- Efficiency to 70% |
| 中文描述： | 200萬(wàn)× 32內(nèi)存為512k × 32 × 4銀行同步DRAM LVTTL |
| 文件頁(yè)數(shù)： | 6/43頁(yè) |
| 文件大?。?/td> | 1155K |
| 代理商： | V62C5181024LL-70P |
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K4S643232C
CMOS SDRAM
REV. 1.1 Nov. '99
- 6 -
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, T
A
= 0 to 70
°
C)
Parameter
Symbol
Test Condition
CAS
Latency
Version
Unit Note
-55
-60
-70
-80
-10
Operating current
(One bank active)
I
CC1
Burst length = 1
t
RC
≥
t
RC
(min)
I
o
= 0 mA
3
140
140
130
130
115
mA
2
2
-
-
-
130
115
Precharge standby current
in power-down mode
I
CC2
P
CKE
≤
V
IL
(max), t
CC
= 15ns
2
mA
I
CC2
PS
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
2
Precharge standby current
in non power-down mode
I
CC2
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 15ns
Input signals are changed one time during 30ns
20
mA
I
CC2
NS
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
10
mA
Active standby current in
power-down mode
I
CC3
P
CKE
≤
V
IL
(max), t
CC
= 15ns
3
mA
I
CC3
PS
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
3
Active standby current in
non power-down mode
(One bank active)
I
CC3
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 15ns
Input signals are changed one time during 30ns
30
mA
I
CC3
NS
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
20
mA
Operating current
(Burst mode)
I
CC4
I
o
= 0 mA
Page burst
2 Banks activated
3
220
200
180
150
130
mA
2
2
-
-
-
130
110
Refresh current
I
CC5
t
RC
≥
t
RC
(min)
3
200
200
180
160
150
mA
3
2
-
-
-
160
150
Self refresh current
I
CC6
CKE
≤
0.2V
2
mA
4
450
uA
5
1. Unless otherwise notes, Input level is CMOS(V
IH
/V
IL
=V
DDQ
/V
SSQ
) in LVTTL.
2. Measured with outputs open.
3. Refresh period is 64ms.
4. K4S643232C-TC**
5. K4S643232C-TL**
Notes :
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
= 0 to 70
°
C)
Parameter
Symbol
Min
Typ
Max
Unit
Note
Supply voltage
V
DD
, V
DDQ
3.0
3.3
3.6
V
4
Input logic high voltage
V
IH
2.0
3.0
V
DDQ
+0.3
V
1
Input logic low voltage
V
IL
-0.3
0
0.8
V
2
Output logic high voltage
V
OH
2.4
-
-
V
I
OH
= -2mA
Output logic low voltage
V
OL
-
-
0.4
V
I
OL
= 2mA
Input leakage current
I
LI
-10
-
10
uA
3
1. V
IH
(max) = 5.6V AC.The overshoot voltage duration is
≤
3ns.
2. V
IL
(min) = -2.0V AC. The undershoot voltage duration is
≤
3ns.
3. Any input 0V
≤
V
IN
≤
V
DDQ
,
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs.
4. The VDD condition of K4S643232C-55/60 is 3.135V~3.6V.
Notes :
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