
RA(6)
RA(5)
RA(0)
Don’tCare
7-BitRegister Address
Read
16-BitRegisterData
SS
SCLK
MOSI
MISO
Hi-Z
D(15)
D(14)
D(0)
Hi-Z
5.7.8
Reading AUX Data in Non-Buffer Mode From SPI
5.7.9
Conversion Time Calculations for the TSC2117
TSC2117
Low-Power Audio Codec With Embedded miniDSP, Stereo Class-D
Speaker Amplifier, and Smart Four-Wire Touch-Screen Controller
www.ti.com
SLAS550A – APRIL 2009 – REVISED JUNE 2009
The next bit is high, which specifies that a read operation follows, then the 16 remaining clocks are used
to get the 16-bit data that is read out in the order of D15–D0. The register address specified in the first
seven clocks of the 24-clock sequence is read out as bits D15–D8, where D15 is the MSB of the byte;
then the register number is incremented by 1 and the data is read from D7–D0, where D7 is the MSB of
that byte. (For reading an X-coordinate, use address 42, and for reading a Y-coordinate, use address 44.)
From this cycle, the first 16-bit data word has been read. This sequence can be repeated to read further
values of X-coordinates and Y-coordinates.
Figure 5-47. 16-Bit Data-Read Timing, 24 Clocks per 16-Bit Data Read, 8-Bit Bus Interface
Reading from the TSC2117 is done by using the protocol called out in
Figure 5-47. This protocol uses a
24-clock sequence to get a 16-bit data read. Set the GPIO1 or GPIO2 interrupt for monitoring the
data-available status by writing to page 3/register 3, bits D1 and D0. Reading is normally done when the
interrupt is low (data is available for reading). Status from the ADC conversion can be read from
page 3/register 9. If bit D6 is set, then the ADC is actively converting, so a BUSY status is read. If bit D5 is
set, then some data is now available for reading. Next, reading from a status register on page 3/register
10 lets us know if data is available for AUX1, AUX2, or VBAT. If bit D7 is set, then AUX1 data can be
read. If bit D6 is set, then AUX2 data can be read. If bit D5 is set, then VBAT data can be read.
The first 7 bits in the read sequence are for the first register address of the two sequential 8-bit registers.
The next bit is high, which specifies that a read operation follows; then the 16 remaining clocks are used
to get the 16-bit data that is read out in the order of D15–D0. The register address specified in the first
seven clocks of the 24-clock sequence reads out as bits D15–D8, where D15 is the MSB of the byte, then
the register number is incremented by 1 and the data is read from D7–D0, where D7 is the MSB of that
byte. (For reading data for AUX1, use page 3/register 54; for reading data for AUX2, use
page 3/register 56; and for reading data for VBAT, use page 3/register 58.) From this cycle, the first 16-bit
data word has been read. This sequence can be repeated to read further values of AUX1, AUX2, and
VBAT data.
This section discusses three conversion time calculations for TSC2117:
1. Touch-screen conversion initiated at touch detect
2. Touch-screen conversion initiated by the host
3. Non-touch-screen measurement operation – temperature, auxiliary, or battery measurements
In all three cases, the timing signals can be programmed by page 3/register 3. GPIO1 or GPIO2 can be
programmed as PINTDAV (page 3/register 3, bits D1–D0) which is used to signal a pen touch detected
and/or data available.
APPLICATION INFORMATION
81