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TSC2117
Low-Power Audio Codec With Embedded miniDSP, Stereo Class-D
Speaker Amplifier, and Smart Four-Wire Touch-Screen Controller
SLAS550A – APRIL 2009 – REVISED JUNE 2009
www.ti.com
Page 0/Register 14: DAC DOSR_VAL LSB(1)(2)
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
1000 0000
DAC OSR Value DOSR(7:0)
0000 0000: DAC OSR(7:0) = 1024 (MSB page 0/register 13, bits D1–D0 = 00)
0000 0001: DAC OSR(7:0) = 1(MSB page 0/register 13, bits D1–D0 = 00)
0000 0010: DAC OSR(7:0) = 2 (MSB page 0/register 13, bits D1–D0 = 00)
...
1111 1110: DAC OSR(7:0) = 1022 (MSB page 0/register 13, bits D1–D0 = 11)
1111 1111: DAC OSR(7:0) = 1023 (MSB page 0/register 13, bits D1–D0 = 11)
(1)
DAC OSR should be an integral multiple of the interpolation in the DAC miniDSP engine (specified in register 16).
(2)
Note that page 0/register 14 must be written to immediately after writing to page 0/register 13.
Page 0/Register 15: DAC IDAC_VAL(1)
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
1000 0000
0000 0000: Number of instruction for DAC miniDSP engine, IDAC = 1024
0000 0001: Number of instruction for DAC miniDSP engine, IDAC = 4
0000 0010: Number of instruction for DAC miniDSP engine, IDAC = 8
...
1111 1101: Number of instruction for DAC miniDSP engine, IDAC = 1012
1111 1110: Number of instruction for DAC miniDSP engine, IDAC = 1016
1111 1111: Number of instruction for DAC miniDSP engine, IDAC = 1020
(1)
IDAC should be an integral multiple of the interpolation in the DAC miniDSP engine (specified in register 16).
Page 0/Register 16: DAC miniDSP Engine Interpolation
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D4
R/W
0000
Reserved. Do not write to these registers.
D3–D0
R/W
1000
0000: Interpolation ratio in DAC miniDSP engine = 16
0001: Interpolation ratio in DAC miniDSP engine = 1
0010: Interpolation ratio in DAC miniDSP engine = 2
...
1101: Interpolation ratio in DAC miniDSP engine = 13
1110: Interpolation ratio in DAC miniDSP engine = 14
1111: Interpolation ratio in DAC miniDSP engine = 15
Page 0/Register 17: Reserved
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
XXXX XXXX
Reserved. Do not write to this register.
Page 0/Register 18: ADC NADC_VAL
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: ADC NADC divider is powered down and ADC_DSP_CLK = DAC_DSP_CLK.
1: ADC NADC divider is powered up.
D6–D0
R/W
000 0001
000 0000: ADC NADC divider = 128
000 0001: ADC NADC divider = 1
000 0010: ADC NADC divider = 2
...
111 1110: ADC NADC divider = 126
111 1111: ADC NADC divider = 127
REGISTER MAP
108