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參數(shù)資料
| 型號(hào)： | TSC2117IRGZT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, QCC48 |
| 封裝： | 7 X 7 MM, GREEN, PLASTIC, VQFN-48 |
| 文件頁(yè)數(shù)： | 144/192頁(yè) |
| 文件大小： | 2728K |
| 代理商： | TSC2117IRGZT |
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1
0
1
HPF
15
1
N
N z
H
(z)
2
D z
-
+
=
-
(5-6)
1
0
1
LPF
15
1
N
N z
H
(z)
2
D z
-
+
=
-
(5-7)
5.6.4.1 DRC Threshold
TSC2117
Low-Power Audio Codec With Embedded miniDSP, Stereo Class-D
Speaker Amplifier, and Smart Four-Wire Touch-Screen Controller
www.ti.com
SLAS550A – APRIL 2009 – REVISED JUNE 2009
DRC can be disabled by writing to page 0/register 68, bits D6–D5.
DRC typically works on the filtered version of the input signal. The input signals have no audio information
at dc and extremely low frequencies; however, they can significantly influence the energy estimation
function in DRC. Also, most of the information about signal energy is concentrated in the low-frequency
region of the input signal.
To estimate the energy of the input signal, the signal is first fed to the DRC high-pass filter and then to the
DRC low-pass filter. These filters are implemented as first-order IIR filters given by
The coefficients for these filters are 16 bits wide in 2s-complement format and are user-programmable
through register write as given in Table 5-33
Table 5-33. DRC HPF and LPF Coefficients
Coefficient
Location
HPF N0
C71 page 9/registers 14 to 15
HPF N1
C72 page 9/registers 16 to 17
HPF D1
C73 page 9/registers 18 to 19
LPF N0
C74 page 9/registers 20 to 21
LPF N1
C75 page 9/registers 22 to 23
LPF D1
C76 page 9/registers 24 to 25
The default values of these coefficients implement a high-pass filter with a cutoff at 0.00166
× DAC_f
S,
and a low-pass filter with a cutoff at 0.00033
× DAC_f
S.
The output of the DRC high-pass filter is fed to the processing block selected for the DAC channel. The
absolute value of the DRC-LPF filter is used for energy estimation within the DRC.
The gain in the DAC digital volume control is controlled by page 0/registers 65 and 66. When the DRC is
enabled, the applied gain is a function of the digital volume control register setting and the output of the
DRC.
The DRC parameters are described in sections that follow.
The DRC threshold represents the level of the DAC playback signal at which the gain compression
becomes active. The output of the digital volume control in the DAC is compared with the set threshold.
The threshold value is programmable by writing to page 0/register 68, bits D4–D2. The threshold value
can be adjusted between –3 dBFS and –24 dBFS in steps of 3 dB. Keeping the DRC threshold value too
high may not leave enough time for the DRC block to detect peaking signals, and can cause excessive
distortion at the outputs. Keeping the DRC threshold value too low can limit the perceived loudness of the
output signal.
The recommended DRC threshold value is –24 dB.
When the output signal exceeds the set DRC threshold, the interrupt flag bits at page 0/register 44, bits
D3–D2 are updated. These flag bits are sticky in nature, and are reset only after they are read back by the
user. The non-sticky versions of the interrupt flags are also available at page 0/register 46, bits D3–D2.
APPLICATION INFORMATION
55
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| TSC2117IRGZT | 制造商:Texas Instruments 功能描述:Touch Screen Controller IC |
| TSC22 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EURO TERMINAL BLOCKS |
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| TSC2200EVM | 功能描述:觸摸傳感器開發(fā)工具 Touch Screen Contr Eval Mod RoHS:否 制造商:Cypress Semiconductor 工具用于評(píng)估: 接口類型: 工作電壓: 最大工作溫度: |
| TSC2200IPW | 功能描述:觸摸屏轉(zhuǎn)換器和控制器 Prog 4-Wire w/12-Bit 125KHz ADC & Key Ifc RoHS:否 制造商:Microchip Technology 類型:Resistive Touch Controllers 輸入類型:3 Key 數(shù)據(jù)速率:140 SPS 分辨率:10 bit 接口類型:4-Wire, 5-Wire, 8-Wire, I2C, SPI 電源電壓:2.5 V to 5.25 V 電源電流:17 mA 工作溫度:- 40 C to + 85 C 封裝 / 箱體:SSOP-20 |
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