參數(shù)資料
型號: TSC2117IRGZT
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, QCC48
封裝: 7 X 7 MM, GREEN, PLASTIC, VQFN-48
文件頁數(shù): 143/192頁
文件大?。?/td> 2728K
代理商: TSC2117IRGZT
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DAC_L
DAC_R
24 dB to Mute
Digital
7- Bit ADC
AVDD
P1
AVSS
R1
R2
18 dB to Mute
24 dB to Mute
D-
DAC
S
D-
DAC
S
VolumeLevel
RegisterControlled
Vol
Ctl
Vol
Ctl
Programmable
DSP
Engine
B0210-05
VREF
IN
AVDD
C
VOL
ToneGeneratorandMixer Are
NOT Shown
VOL/
MICDET
Programmable
DSP
Engine
5.6.4
Dynamic Range Compression
TSC2117
Low-Power Audio Codec With Embedded miniDSP, Stereo Class-D
Speaker Amplifier, and Smart Four-Wire Touch-Screen Controller
SLAS550A – APRIL 2009 – REVISED JUNE 2009
www.ti.com
The VOL/MICDET pin connection and functionality are shown in Figure 5-33.
Figure 5-33. Digital Volume Controls for Beep Generator and DAC Play Data
As shown in Table 5-31, the VOL/MICDET pin has a range of volume control from 18 dB down to –63 dB,
and mute. However, if less maximum gain is required, then a smaller range of voltage should be applied
to the VOL/MICDET pin. This can be done by increasing the value of R2 relative to the value of (P1 + R1),
so that more voltage is available at the bottom of P1. The circuit should also be designed such that for the
values of R1, R2, and P1 chosen, the maximum voltage (top of the potentiometer) does not exceed
AVDD/2 (see Figure 5-33). The recommended values for R1, R2, and P1 for several maximum gains are
shown in Table 5-32. Note that In typical applications, R1 should not be 0
, as the VOL/MICDET pin
should not exceed AVDD/2 for proper ADC operation.
Table 5-32. VOL/MICDET Pin Gain Scaling
ADC VOLTAGE
R1
P1
R2
DIGITAL GAIN RANGE
for AVDD = 3.3 V
(k
)
(k
)
(k
)
(dB)
(V)
25
0
0 V to 1.65 V
18 dB to –63 dB
33
25
7.68
0.386 V to 1.642 V
3 dB to –63 dB
34.8
25
9.76
0.463 V to 1.649 V
0 dB to –63 dB
Typical music signals are characterized by crest factors, the ratio of peak signal power to average signal
power, of 12 dB or more. To avoid audible distortions due to clipping of peak signals, the gain of the DAC
channel must be adjusted so as not to cause hard clipping of peak signals. As a result, during nominal
periods, the applied gain is low, causing the perception that the signal is not loud enough. To overcome
this problem, DRC in the TSC2117 continuously monitors the output of the DAC digital volume control to
detect its power level relative to 0 dBFS. When the power level is low, DRC increases the input signal gain
to make it sound louder. At the same time, if a peaking signal is detected, it autonomously reduces the
applied gain to avoid hard clipping. This results in sounds more pleasing to the ear as well as sounding
louder during nominal periods.
The DRC functionality in the TSC2117 is implemented by a combination of processing blocks in the DAC
channel as described in Section 5.6.1.2.
APPLICATION INFORMATION
54
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