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參數(shù)資料
| 型號： | TSC2117IRGZT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, QCC48 |
| 封裝： | 7 X 7 MM, GREEN, PLASTIC, VQFN-48 |
| 文件頁數(shù)： | 150/192頁 |
| 文件大?。?/td> | 2728K |
| 代理商： | TSC2117IRGZT |
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5.6.6
Programming DAC Digital Filter Coefficients
5.6.7
Updating DAC Digital Filter Coefficients During PLAY
TSC2117
Low-Power Audio Codec With Embedded miniDSP, Stereo Class-D
Speaker Amplifier, and Smart Four-Wire Touch-Screen Controller
SLAS550A – APRIL 2009 – REVISED JUNE 2009
www.ti.com
3. For the beep-length values, if number of bits is less than the full 24-bit value, then the unused MSBs
must be written as 0s.
Following the beep volume control is a digital mixer that mixes in a playback data stream whose level has
already been set by the DAC volume control. Therefore, once the key-click volume level is set, the
key-click volume is not affected by the DAC volume control, which is the main control available to the end
user. This functionality is shown in Figure 1-1.
Following the DAC, the signal can be further scaled by the analog output volume control and power
amplifier level control.
The beep generator (used for key-click function) can be operated in two modes, manual and automatic
mode. In manual mode, a single beep is generated by writing to page 0/register 71, bit D7. After the
programmed beep length has finished, register 71, bit D7 is reset back to zero. In the automatic mode, a
beep occurs at the transition of PEN DOWN detection; however, a beep does not occur at the transition of
PEN UP detection. The automatic mode is disabled by default. Automatic mode can be enabled by writing
to page 0/register 71, bit D6. This functionality is shown in Figure 5-36. To minimize the risk of erroneous
beeps occurring, the PEN UP debounce is applied as programmed on page 3/register 18, bits D2–D0.
The digital filter coefficients must be programmed through either the I2C or SPI interface. All digital filtering
for the DAC signal path must be loaded into the RAM before the DAC is powered on. (Note that default
ALLPASS filter coefficients for programmable biquads are located in boot ROM. The boot ROM
automatically loads the default values into the RAM following a hardware reset (toggling the RESET pin)
or after a software reset. After resetting the device, loading boot ROM coefficients into the digital filters
requires 100
s of programming time. During this time, reading or writing to page 8 through page 15 for
updating DAC filter coefficient values is not permitted. (The DAC should not be powered up until after all
of the DAC configurations have been done by the system microprocessor.)
When it is required to update the DAC digital filter coefficients or beep generator during play, care must be
taken to avoid click and pop noise or even a possible oscillation noise. These artifacts can occur if the
DAC coefficients are updated without following the proper update sequence. The correct sequence is
shown in Figure 5-35. The values for times listed in Figure 5-35 are conservative and should be used for
software purposes.
There is also an adaptive mode, in which DAC coefficients can be updated while the DAC is on. For
details, see Section 5.6.1.3.
APPLICATION INFORMATION
60
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| TSC2117IRGZT | 制造商:Texas Instruments 功能描述:Touch Screen Controller IC |
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