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參數(shù)資料
| 型號(hào)： | ST52T301P |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-Bit OTP/EPROM DuaLogic] MCUs WITH ADC, UART, TIMER, TRIAC & PWM DRIVER |
| 中文描述： | 8位檢察官辦公室/存儲(chǔ)器DuaLogic]與藝術(shù)發(fā)展局和UART，定時(shí)器，可控硅控制器 |
| 文件頁數(shù)： | 8/100頁 |
| 文件大?。?/td> | 497K |
| 代理商： | ST52T301P |
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It isnot possibileto stopthe fuzzyinferencebefore
theendof thedefuzzificationof one output.Asetof
26 different arithmetic and logic instructions is
available.Eachinstructionrequiresfrom4 to7clock
pulsesto be performed.
2.1.1 ProgramCounter
The Program Counter(PC) is a 11-bitregisterthat
containsthe address of the next memory location
to be processedbythe core.Thismemory location
maybe anopcode,an operandoranaddressof an
operand.
The 11-bit length allows the direct addressing
mode of 2048 bytes in the programspace.
After having read the current instruction address,
the PC value is incremented. To execute relative
jumpsthe PCand theoffsetare shiftedthroughthe
Fuzzy Core or the ALU, where they will be added.
The result of this operationis shifted back into the
PC.
The PC can be changed in the following ways:
JP (Jump) instruction PC = Jump Address
Interrupt
RETI instruction
PC= InterruptVector
PC = Pop(stack)
Reset
Normal Instruction
PC = Reset Vector
PC = PC + 1
2.1.2 Flags
TheST52x301coreincludestwopairsof flagsthat
correspondto 2 differentmodes:normalmodeand
interrupt mode.Each pair consist of a CARRY flag
anda ZEROflag.Onepair (CN,ZN)is usedduring
normal operation and one is used during the
interrupt mode (CI, ZI).
The ST52x301 core uses the pair of flags that
correspond to the actual mode: as soon as an
interruptisgenerated,the ST52x301coreusesthe
interruptflagsinsteadof thenormalflags.Whenthe
RETI instruction is executed the normal flags are
restoredif theMCUwasinthenormalmodebefore
the interrupt. It should be observedthat each flag
setcan only be addressedin its own routine.
The flags are not cleared during the context
switching and remain in the state theywere at the
exit of the last routine switching.
The Carry flag is set when a carry or a borrow
occursduring arithmeticoperations,otherwiseit is
cleared.
The switching between the two sets of flags is
automatically performed when an interrupt or a
RETI instruction occur.
2.2 ADDRESS SPACES
W.A.R.P3TC has four separateaddressspaces:
RegisterFile:16 8-bit registers
Input Registers:11 8-bitregisters
ConfigurationRegisters:16 8-bit registers
PeripheralRegisters:3 8-bit registers
Program memory up to 2K Bytes
The Program memory will be described in further
detail in the MEMORYsection
2.2.1 Register File
The Register File (RF) consists of 16 general
purpose 8-bit registersReg0 to Reg15.
Allthe registersin theRF canbe specifiedbyusing
a decimal address,
e.g. 0 identify the first register of the RF, called
Reg0.
Reg0:3 are directly connected to the FC input. It
means that the input values of the fuzzyalgorithm
must be loaded into theseregisters bythe user.
These registers are used as temporary registers
duringthe macros’computation.
8/99
ST52T301/E301
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