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參數(shù)資料
| 型號： | ST52T301P |
| 廠商： | 意法半導體 |
| 英文描述： | 8-Bit OTP/EPROM DuaLogic] MCUs WITH ADC, UART, TIMER, TRIAC & PWM DRIVER |
| 中文描述： | 8位檢察官辦公室/存儲器DuaLogic]與藝術發(fā)展局和UART，定時器，可控硅控制器 |
| 文件頁數(shù)： | 52/100頁 |
| 文件大小： | 497K |
| 代理商： | ST52T301P |
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Bit
Name
Value
Description
0
TCRST
0
Triac Reset
1
Triac Set
1
TCST
0
Triac Stop
1
Triac Start
2
MODE
00
not used
01
PWM signal Generator
3
10
Burst Mode
(1)
11
Phase Partialization
4
CKSL
00
Clock Master
01
External Clock on MAIN1
5
1x
Main Voltage Frequency
6
PSF
0
Main Power at 50 Hz
1
Main Power at 60 Hz
7
IOSL
0
MAIN2 Input pin
1
MAIN2 Output pin
Note:
(1)
CKSL must be set to ”1x”
Table10.4 ConfigurationRegister 10 Description
Bit
Name
Value
Description
0
POL
0
Output pulse Polarity=
positive
1
Output pulse Polarity=
negative
1
TCTRS
0
TRIACOUT status = Tristate
1
TRIACOUT status = Enabled
2
TCMSK
Masking time
=(2^TCMSK*200 +100) nS.
TCMSK=0
→
Masking time=0
3
4
5
6
INTSL
00
No Interrupt source selected
01
Interrupt on falling edge of
the TRIAC/PWM signal, or of
the Main Voltage
7
10
Interrupt on rising edge of
the TRIAC/PWM signal, or of
the Main Voltage
11
Interrupt on both of edges of
the TRIAC/PWM signa,l or of
the Main Voltage
Table10.5 ConfigurationRegister 11 Description
Bit
Name
Value
Description
0
÷
5
UTPMSB
Output Impulse Width most
significative bits
6
INPSL
0
TRIAC/PWM Input from
Fuzzy Output
1
TRIAC/PWM Input from
Register File
7
FZSL
0
TRIAC/PWM Input from
Fuzzy Output 1
1
TRIAC/PWM Input from
Fuzzy Output 2
Table10.6. ConfigurationRegister 12 Description
It is possible SET or RESET the TRIAC/PWM
Peripheral by using the REG_CONF10(0) bit,
TCRST (seeTable10.4).
If TRIAC/PWM Peripheral is SET, It is possible
START or STOP it, byusing the REG_CONF10(1)
bit, TCST (see Table 10.4), to start or stop the
internal counterwithout resetting it.
Itis possibletoenabletheTRIACOUT, byusingthe
REG_CONF11(0)bit, TCTRS (seeTable10.5 and
Figure10.11).
IFTCTRSis0theTRIAC/PWMPeripheraloutput
is in tristatestatus.
52/99
ST52T301/E301
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