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參數(shù)資料
| 型號： | ST52T301P |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 8-Bit OTP/EPROM DuaLogic] MCUs WITH ADC, UART, TIMER, TRIAC & PWM DRIVER |
| 中文描述： | 8位檢察官辦公室/存儲器DuaLogic]與藝術(shù)發(fā)展局和UART，定時器，可控硅控制器 |
| 文件頁數(shù)： | 28/100頁 |
| 文件大?。?/td> | 497K |
| 代理商： | ST52T301P |
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6. A/D CONVERTER
The A/D Converter of ST52x301is an 8-bit analog
to digital converter with up to 4 analog inputs
offering8 bit resolution with a total accuracy of 2
LSB and a typicalconversiontime of 32
μ
s.
Theconversionrange is 0 - 2.5V.
The A/D peripheralconverts the input voltagewith
a process of successive approximations using a
fixed clock frequencyderived from the oscillator.
The ADC uses 5 registers: one Configuration
Register, REG_CONF2, and four Data Registers.
These4 registersare the first4 InputRegisters.
The A/D converterdrivesthe analog Multiplexer in
order to sequentiallypick up the externalinputs to
be put in output and stored automaticallyin 4 8-bit
registers.
Itispossibileto configuretheMultiplexerbymeans
of the registerREG_CONF2, in orderto select the
numberof analog inputs to convert.
For example, if the bit 3 and bit 2 of REG_CONF2
are configured at 10, then the Multiplexer will
sequentiallypick up only the inputs 0,1 and 2.
Table 6.1 shows the convertion sequences
according to the possible values of the two bit
REG_CONF2(3:2).
The A/D Converter, at the end of the conversion,
willsendasignal(end-of-conversion)whichcanbe
used like an interrupt signal. The user can select
the priority of the A/D interrupt and mask it (see
”Interrupt Routine” chapter)
The
conversion
starts
REG_CONF2(0).The A/Dis reset by writing ”0” in
REG_CONF2(0).
Theconverteddataare automaticallystoredin four
8-bit Input Registers.
By performingan instruction:
LDRI regj ingi
theanaloginput”ingi”is loadedintheregister”regj”
of the Register File.
writing
”1”
on
Figure6.1.A/D Converter Structure
CONF_REG2 (3:2)
INPUT SEQUENCE
00
Ain0
01
Ain 0, Ain1
10
Ain 0, Ain1, Ain 2
11
Ain 0, Ain1, Ain 2, Ain 3
Table6.1.
28/99
ST52T301/E301
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