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參數(shù)資料
| 型號： | SST65P542R |
| 廠商： | Silicon Storage Technology, Inc. |
| 英文描述： | MOSFET; Transistor Polarity:N Channel; Continuous Drain Current, Id:15A; On-Resistance, Rds(on):0.01ohm; Package/Case:8-SOIC; Leaded Process Compatible:No; Mounting Type:surface mount; Peak Reflow Compatible (260 C):No |
| 中文描述： | 遙控器控制器 |
| 文件頁數(shù)： | 21/40頁 |
| 文件大?。?/td> | 538K |
| 代理商： | SST65P542R |
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Advance Information
Remote Controller MCU
SST65P542R
21
2001 Silicon Storage Technology, Inc.
S71170-03-000
12/01 368
5.0 FLASH MEMORY PROGRAMMING
5.1 In-Application Programming
SST65P542R allows “In-Application Programming” (IAP)
to update the user code in the internal 16 Kbyte Super-
Flash memory. All Write/Erase operations require setting
the enable bit in the SuperFlash Function Register (SFFR)
located at 000BH. The following sections describe the
operations that the MCU performs to alter the contents of
SuperFlash Memory. For detailed explanation of the Super-
Flash Function Register, please refer to Section 3.1.
5.1.1 Chip-Erase
The Chip-Erase operation requires MEREN and MERA
bits to be set to logical “1”. After setting these bits, writing
any data to any address location of the flash memory will
trigger the Chip-Erase operation. The MCU is idle while
SST65P542R is busy doing erases on all memory loca-
tions.
5.1.2 Sector-Erase
The Sector-Erase operation requires SEREN and SERA
bits to be set to logical “1”. After setting these bits, writing
any data to the address within the sector to be erased will
erase the data in the sector. The MCU is idle while
SST65P542R is busy doing erase on the sector.
5.1.3 Byte-Program
The Byte-Program operation requires PREN and PROG
bits to be set to logical “1”. After setting these bits, and then
writing the data to the target address to be programmed.
The MCU is idle while SST65P542R is busy doing pro-
gramming on the byte. Refer to the following summary for
all different functions.
.
TABLE
5.2 External Host Programming Mode
The external host programming mode is to provide pro-
grammer access to the 16KB embedded flash memory of
the SST65P542R. To enter the external host programming
mode, users must follow the setup sequences on the pins
(See Figure 11-1):
1. RY/BY# (pin 12) and POROUT# (pin 13) are out-
put pins. Do not drive.
2. Drive RST# (pin 24) low.
3. Drive LPRST# (pin 21) low.
4. Drive LPRST# (pin 21) high after T
RST
.
5. Drive PROG_RST (pin 9) low.
6. Drive 9 clocks on TCLKIN. On each clock's rising
edge provide one bit of data on TDIN (pin 19) as
shown in Figure 11-1. The data bits are
“11010011”.
7. Wait for RY/BY# (pin 12) and POROUT# to go
high.
8. Drive at least 24 clocks on TCLKIN.
9. If Read-protect byte is set, then RY/BY# will go
low. Otherwise, RY/BY# will stay high. If RY/BY# is
low, wait for RY/BY# (pin 12) to go high. Now the
SST65P542R is in external host programming
mode and is ready for embedded flash Read or
Write operations.
Now the SST65P542R is in the external host programming
mode and is ready for embedded flash by the external host
Read or Write.
As soon as the RST# is released to ‘1’, chip exits external
host programming mode and then enters user mode.
5.2.1 External Host Mode Read Operation
As shown in Figure 11-2, the Read operation needs two
address setup cycles and one data setup cycle. The low to
high transition on SCLK latches the high order address
A[13:8] from the pin AD[5:0] while MODE[1:0] inputs are
set to 0H; the low to high transition on SCLK latches the
low order address A[7:0] from the pin AD[7:0] while the
MODE[1:0] inputs are set to 3H and setting the signal OE#
to low; the low to high transition on SCLK latches the data
D[7:0] on the pin AD[7:0] while the MODE[1:0] is set to 1H
for reading. After reading the data, the external host should
set the signal OE# to high.
5-1: SFFR C
OMMANDS
Function
Chip-Erase
Sector-Erase
Command
Writes to
SFFR
44H
22H
Comment
Erase the whole flash memory
Erase the sector
addressed by CXXXH
Program one data byte to
address CXXXH.
Write data to CXXXH
before Byte-Program can be
performed, a Chip-Erase or
Sector-Erase must be issued
to erase the target
programming locations.
Byte-Program
88H
T5-1.1 368
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