參數(shù)資料
型號(hào)： SAA7146A
廠商： NXP Semiconductors N.V.
英文描述： Multimedia bridge, high performance Scaler and PCI circuit SPCI
中文描述： 多媒體橋梁，高性能潔牙機(jī)和PCI電路SPCI
文件頁數(shù)： 55/144頁
文件大?。?/td> 645K
代理商： SAA7146A
1998 Apr 09
55
Philips Semiconductors
Product specification
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
Table 49
Event Counter Threshold set 1 Register (ECT1R)
Note
1.
Each of these threshold values shows the limit up to which the related counter will run before it sets its interrupt status
bit.
2C
2D
2E
2F
30
31
32
33
34
35
36
37
38
39
3A
3B
3C
3D
3E
3F
IIC_ER
IIC_EL
IIC_EF
V3P
V2P
V1P
VF3
VF2
VF1
AF2_in
AF2_out
AF1_in
AF1_out
VGT
LNQG
EC5S
EC4S
EC2S
EC1S
number of I
2
C-bus read data errors
number of arbitration losses on the I
2
C-bus
number of I
2
C-bus frame errors
number of protection violations for video FIFO 3
number of protection violations for video FIFO 2
number of protection violations for video FIFO 1
number of missed Dwords
number of missed Dwords
number of missed Dwords
number of missed Dwords
number of missed Dwords
number of missed Dwords
number of missed Dwords
reserved
number of V_syncs in acquisition of HPS
number of output lines
number of threshold overflows of EC5
number of threshold overflows of EC4
number of threshold overflows of EC2
number of threshold overflows of EC1
OFFSET
(HEX)
NAME
BIT
TYPE
DESCRIPTION
EC
ECT2 [9:0]
31 to 22
RW
Event Counter 2 Threshold
: this is the threshold for the
second 10-bit counter; see note 1
Event Counter 1 Threshold
: this is the threshold for the first
10-bit counter; see note 1
Event Counter 0 Threshold
: this is the threshold for the first
12-bit counter; see note 1
ECT1 [9:0]
21 to 12
RW
ECT0 [11:0]
11 to 0
RW
ADDRESS
(HEX)
STATUS BIT
EVENTS TO BE COUNTED
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